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Thread: Future Teensy features & pinout

  1. #26
    For the teensy 5.0 for sure 2 full SPI busses next to the on board uSD. One of the SPI could be pre-wired to smd pads where a psram could be optionally soldered.

    I would reconsider the flash architecture and implement support for OTA. In the sense of offering software upgradability from the SOC itself. E.g. multiple SW images selectable from uSD/flash at (re)boot with file system partition definition for flash.
    Not sure if it would require a companion chip.

  2. #27
    Senior Member+ defragster's Avatar
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    The M4 indicated in the one linked NXP doc {Document Number: IMXRTPORTFS REV 0} shows 256KB of TCM RAM.
    Code:
    Real-time, low-latency response
     Up to 2 MB of SRAM
     512 KB of TCM with ECC for Cortex-M7
     256 KB of TCM with ECC for Cortex-M4
    Not sure if RAM is FLAT and fully accessible/shared to BOTH cores ( in chunks like 1062? ) - but that suggests RAM is a combined 'up to 2 MB'

    I Got some PICO ESP32 TinyPICO units through CrowdSupply - that AdaFruit just picked up. They ship with uPython but just got ARDUINO Hardware specific lib in the espressif v1.0.3 release.

    With ARDUINO :: They work with built in RTOS and quick tests (with v1.0.2) show loop() runs on core1 and radio dedicated to core0. Tasks can be created assigned to a core or not. That showed the two symmetric 240 MHz cores are each in the ballpark of a T_3.6. So with Arduino they have built RTOS support into the ESP32 - not sure how that relates to future dual core things like 1170 (elevenSeventy) with asymmetric cores/MCU coding/libs. Paul may have some Heavy Lifting to do to utilize the M4.

  3. #28
    Regarding the IMXRT1170, assuming a MAPBGA-289 pitch of 0.8mm, the package would likely be 14x14mm. This would fit well in the Adafruit Feather form factor which has become so popular.

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    Depending on the necessary additional components, there might be enough room for an SD card holder, a second row of headers (at least left and right of the MCU), or multiple perpendicular rows of headers. I do think headers are preferable to pads or FFC connectors for the usual signals. Designing a function-specific shield/hat/wing/whatever to stack on top is so much easier for us hobbyists. That being said, I don't really know what types of signals can even be practically broken out as pin headers without worrying about their integrity.

    With the kind of performance this MCU can offer, I think the nature of the projects/applications targeting it will likely be more multimedia oriented. Having dedicated MIPI CSI/DSI FFC (vertical, like RPi) connectors could be useful for such applications.

  4. #29
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    Quote Originally Posted by DaQue View Post
    1170 1070 was a typo

  5. #30
    Senior Member PaulStoffregen's Avatar
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    Quote Originally Posted by MichaelMeissner View Post
    I wonder what the M4 is for
    One usage model I've seen suggested for other chips with M4 & M0 is to have the low power processor perform most "always on" tasks (minimizing power consumption) and use the powerful core as a sort of co-processor when needed for certain heavy tasks (in low power sleep when not needed).

    Of course, in this case the low power M4 will still be about twice the performance of a Teensy 3.6. Pretty amazing times ahead!

    But in terms of really new stuff, the MIPI CSI & DSI and OpenVG look really interesting...

  6. #31
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    ESP32 has dual cores that pretty easy to use, with the help of FreeRTOS. Here's a simple tutorial: https://randomnerdtutorials.com/esp3...e-arduino-ide/

  7. #32
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    I've been thinking the same as @blacketter. I've been playing with concurrent tasks on the two cores of the ESP32 with FreeRTOS, and I'm impressed. I believe it might be a good time to think of a move to RTOS when a dual core Teensy arrives.

  8. #33
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    Quote Originally Posted by MichaelMeissner View Post
    I wonder what the M4 is for
    I suspect it's mainly for security/reliability. The architecture is similar to ARM processors with TrustZone. NXP calls it their "signature EdgeLock security solution".

    The idea is sometimes called "Silicon Security". TrustZone allows you to partition you system into two zones, Trusted and Non Trusted. This includes all I/O controllers. Dual CPUs are better than a single ARMv8-M CPU.

    Click image for larger version. 

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    This will finally allow low cost IoT devices to have real security. Reliability can be even more important than security in some applications.

    I spent most of my career working on large physics experiments. In the late 1970s we started using RTOSs to separate critical control software from application oriented software. It never really worked as well as we hoped.

    The LHC experiment at CERN used FPGAs instead of a RTOS to implement the idea of soft CPUs with TrustZone. It works OK but the CPUs are slow.

    The i.MX RT1170 looks great for things like LHC where thousands of control processors need to run reliably for the experiment to function.

  9. #34
    After thinking about it for a bit, I wonder where an 1170 Teensy would/could exist in the market. The performance of even the T4 seems to be bounded more by it's IO than anything else. The 1170 even more so. Not having an integrated radio like the Espressif offerings make it difficult to compete there. General CV/NN/ML performance will always be outperformed by SB-GPUs such as the Jetson Nano, or ASICs like the Kendryte K210 or the Google Edge TPU. Linux SBCs are like sand at the beach. So, what else is left? What is the right kind of workload for a 1Ghz MCU with a co-processor?

    Instead of trying to answer that question, I think a 1170 Teensy would benefit from just providing different flavors of high bandwidth IO. I'm sure there are a number of applications requiring a much higher IO bandwidth than what is practically possible with an existing MCU. High speed Ethernet interconnects are currently the realm of Linux SBCs, but I think there are a number of applications that are power sensitive, latency sensitive, or would simply benefit from more robust, deterministic behavior.

    As a specific example (and pet project), I've always found it silly that a guitar, with it's multiple strings, typically has an analog, monophonic output, highly susceptible to EMI, whose sound is permanently "colored" by a combination of pickups, wiring, and amplifiers. What I also find silly is if you do indeed have multiple pickups, is sending the analog signals individually over a thick cable to a breakout box. This is where a robust, low latency, multi-channel audio CODEC, Ethernet with POE, and an AES67 implementation would be the DIY alternative to Audinate's expensive Dante stuff. A Raspberry Pi just wouldn't cut it here.

    So, to summarize, if planing a Teensy based on the 1170, prioritize breaking out the high bandwidth interfaces such as CSI/DSI, I2S, and Ethernet, perhaps even at the expense of a couple of the extra lower speed interfaces (UART, I2C, CAN, etc.).

  10. #35
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    Jtag debug PINs are definitely on top of my wish list.

  11. #36
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    Quote Originally Posted by MartinZ View Post
    Jtag debug PINs are definitely on top of my wish list.
    personally i would like to see you sell several shields we can plug a T4.x into

    some suggestions

    5v tolerant pins
    bluetooth
    sd card
    more robust usb connector
    screw connections and female headers
    tft screen shield
    video camera shield
    rugged shield - for harsh environment / overvoltages

    the extra circuitry can go on the shield - not the T4.x

    what are peoples thoughts ?

  12. #37
    USB C connector for more power to power stuff,
    More ground pins for better SI return paths,
    I dont like using pogo pins to get at extra pins,
    As an idea use tighter pitch connectors on new teensy, but offer a 0.1" pitch adapter for bread boarding stuff.

  13. #38
    I think if you duplicate what you did for the 3.5/3.6, you'll have a winner. More flash, please, and I really would love to see wifi, but I can adapt to it externally.

  14. #39
    Senior Member vjmuzik's Avatar
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    If WiFi is going to be option or at least available as an addon board it may be helpful to breakout both SDIO ports so one can be used for a WiFi chip and the other for an SD card.

  15. #40
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    How about a beefier or 2nd controllable 3.3 voltage regulator?

  16. #41
    Senior Member+ defragster's Avatar
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    Quote Originally Posted by DaQue View Post
    How about a beefier or 2nd controllable 3.3 voltage regulator?
    Indeed seems I noted that in some fashion post #6 - and posted yesterday in T4_Beta thread that with OC and USBHost active 1062 can hit 200 to 350+ mA quickly with no display or anything and require a powered USB Hub otherwise.

  17. #42
    Senior Member PaulStoffregen's Avatar
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    Quote Originally Posted by Gadget999 View Post
    personally i would like to see you sell several shields we can plug a T4.x into
    ....
    what are peoples thoughts ?
    Best to start a separate thread for each specific shield, or group of related shields (like rugged vs screw terminals). Mixing shield requests into this thread means your feedback on shields is probably going to be lost in the conversation about the many amazing features of the 1170 chip.

  18. #43
    Senior Member+ defragster's Avatar
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    MichaelMeissner started such a thread :: Possible-new-shields

    Reading more into Paul's note this thread is expected to discuss and be :: " conversation about the many amazing features of the 1170 chip "

    Which suggests feed back about the Larger Follow on 1062 Teensy 4.x1 expected to arrive first would also be lost here as well where they won't be common ?

  19. #44
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    You’re right bigger regulator is more a 4.01 hope. My bad

  20. #45
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    Quote Originally Posted by DaQue View Post
    You’re right bigger regulator is more a 4.01 hope. My bad
    But any 1070 based item would also likely have a lot tacked onto it to leach power.

  21. #46
    Senior Member+ defragster's Avatar
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    Quote Originally Posted by DaQue View Post
    You’re right bigger regulator is more a 4.01 hope. ...
    not bad ... That would be a common concern for both I expect. The T4.0 MCU on small PCB can eat a lot before adding much and it can go up quickly, and 1170 likely won't be any less - especially if SD card onboard etc.

    Also as noted in that p#6 … " Going to get confusing here " - because it wasn't clear which new Teensy this thread was to focus on - if there was a reply before p#42 saying '1170' … I missed it.

    Ideally it seems where possible both new units will share as much as common as possible to make them interchangeable as needed - building on T_4.0 layout like the T_3.x family did so well.

  22. #47
    Senior Member+ mjs513's Avatar
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    Quote Originally Posted by PaulStoffregen View Post
    One usage model I've seen suggested for other chips with M4 & M0 is to have the low power processor perform most "always on" tasks (minimizing power consumption) and use the powerful core as a sort of co-processor when needed for certain heavy tasks (in low power sleep when not needed).

    Of course, in this case the low power M4 will still be about twice the performance of a Teensy 3.6. Pretty amazing times ahead!

    But in terms of really new stuff, the MIPI CSI & DSI and OpenVG look really interesting...
    Video and camera really sounds like cool features to add to the system. But would like to see maybe a beefier power supply and the sd card on the next revision.

    Had a radical idea for you - maybe make one version for those that are audiophiles and another version more for general use.

    Design choices are tough to keep a balanced designed for everyone to be able to use.

  23. #48
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    Count 1 for T3.6 form factor with onboard MicroSD.

  24. #49
    I am now designing a mainboard for a design that include Teensy 4.0 and would appreciate this method of soldering the teensy to a PCB.

    https://cdn.sparkfun.com/assets/lear...utorial-32.jpg

    As for the bottom pads of the T4.0, it's not obvious how to connect to them. My point is to design the next Teensy as a component that can also be assembled on a PCB, being low profile and being able to use all the advertised capabilities and I/O.

  25. #50
    Form factor for lots of I/O, DIMM module? https://wiki.somlabs.com/index.php/VisionSOM-RT

    On a 4.1 I would very much like both of the Ethernet ports on the 1162 brought out as RMII signals. I can roll my own phy, magnetics and connectors. SD for sure, and USB host pins ala 3.6 would be great. The 4 or so UART type serial ports would be useful for some of my applications.

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