Forum Rule: Always post complete source code & details to reproduce any issue!
Page 23 of 24 FirstFirst ... 13 21 22 23 24 LastLast
Results 551 to 575 of 578

Thread: Future Teensy features & pinout

  1. #551
    Senior Member
    Join Date
    Oct 2019
    Posts
    182
    I have a project where I need dedicated analog comparators with digital output that compare an input with a DAC-generated reference from the MCU. I've been using an MCU with three onboard comparators, a DAC and some useful hardware LUT features. I didn't think Teensy units had these features, but now that I read the NXP datasheet, it seems there are four analog comparators. Documentation in the datasheet is light and I don't remember seeing any mention in Teensy docs.

    Are these features something that could be enabled at present with a code library? If not, could they be enabled easily in a future release?

  2. #552
    Senior Member+ manitou's Avatar
    Join Date
    Jan 2013
    Posts
    2,732
    Quote Originally Posted by kdharbert View Post
    I have a project where I need dedicated analog comparators with digital output that compare an input with a DAC-generated reference from the MCU. I've been using an MCU with three onboard comparators, a DAC and some useful hardware LUT features. I didn't think Teensy units had these features, but now that I read the NXP datasheet, it seems there are four analog comparators. Documentation in the datasheet is light and I don't remember seeing any mention in Teensy docs.

    Are these features something that could be enabled at present with a code library? If not, could they be enabled easily in a future release?
    I think the Teensy 4 NXP SDK has examples using the ACMP comparators and DACs, see boards/evkmimxrt1060/driver_examples/cmp/polling/. The T4 "internal" DACs are only 6-bit. Here is a simple proof-of-concept:
    https://github.com/manitou48/teensy4...er/acmpdac.ino
    https://forum.pjrc.com/threads/54711...l=1#post195602

    and a thread on T4 comparators using XBAR to redirect ACMP output.

    you might search the forums for "comparator" ...

    the new NXP 1170 has a similar ACMP comparator architecture with 8-bit internal DAC (0 to 1.8v). See 1170 SDK example
    boards/evkmimxrt1170/driver_examples/acmp/polling/
    Last edited by manitou; 01-29-2022 at 08:10 PM.

  3. #553
    Senior Member
    Join Date
    Oct 2019
    Posts
    182
    Thanks...already tried the search and it didn't look promising. I'll retry..

  4. #554
    Just for what it is worth NXP i.MX RT1176 -based products start to emerge: https://coral.ai/products/dev-board-micro/

  5. #555
    Member
    Join Date
    May 2020
    Location
    South East England
    Posts
    24
    Future Teensy FreqCount() enhancement
    It would be good for those of us wishing to squeeze the last ounce of performance from FreqCount() (and possible FreqMeasure()) if the clock used by those functions could be from an external precision source.


    The microprocessor clock on Teensy is derived from a budget price crystal because for most applications the exact frequency does not matter too much, give or take a few dozen parts per million. For my Lab-In-A-Box project I would like the frequency to be more precise and less subject to temperature variation. My typical user would most likely be synchronising most of his test bench equipment to a master 10MHz source derived from a GPS satellite receiver.


    The Teensy 5.x clock (??) could ideally be derived from a stable input provide by the user; maybe by including a line of code such as <ExtRefClock(Pin#n,FF)> where 'FF' is the frequency of the external source. The Teensy would start up normally using the on board Xtal, then when it encountered the instruction to use the external input would confirm it was present and switch over to using it.


    As an alternative could the clock used by FreqCount() be input on a pin and just that section of the Teensy's logic switched to use it? (Might that could even be possible with the existing Teensy4.x family?) I can foresee problems doing this if sections of the on-board functionality are derived from PLL multipliers from the base crystal frequency.... but if you don't ask you don't get!


    As mentioned before, a precision GPS locked 10MHz clock is not uncommon in an electronics lab so 10MHz would be a good fixed frequency to consider if a wide range of values for 'FF' is a challenge.


    As a minimum, how about providing an easy-to-do track cut and a pad to allow an input from a GPS locked clock or a temperature compensated oscillator to replace the on-board clock?


    PS: I put clock stability ahead of frequency accuracy, a stable fixed error can be calibrated out.


    RichardL
    (G8CDD)

  6. #556
    Voting for 6 complimentary pins on a eFlexPWM as to use deadtime insertion for BLDC commutation purposes. The dual core nature of the RT1170 makes it very cool for having the 1Ghz core work on the motor and the M4 do the communication/ HMI Definitely room for future progress in ebike/eMTB optimization. Any news about launch?

  7. #557
    Junior Member
    Join Date
    Apr 2022
    Posts
    6

    Lightbulb Form factor idea for the 1170-based Teensy

    So I'm new here but after being blown away by the sheer power of my first Teensy, the 4.1, I just had to search for any hints as to the next version which might be released, and found this thread. Thanks Paul and Robin (and whoever else put in time on making these microcontrollers completely mental) for the awesome work!

    Ok, on to my two cents:


    Quote Originally Posted by PaulStoffregen View Post
    ...
    I'm definitely planning to make a larger form factor Teensy with the 1170 chip.
    ...
    Perhaps a 64-DIP footprint, as found on some older CPUs? The Motorola 68000, for example, came in this package, with versions sporting both the standard 2.54 mm pin pitch and a more condensed 1.78 mm pitch, for which adapters could be used to suit applications which originally called for the larger model. Similarly, such an adapter could be made to use a 1.78 mm pitch Teensy with breadboards.

    On a side note, it would be pretty humorous to hold the two side-by-side knowing the Teensy could totally obliterate the 68K despite being the very same size lol

  8. #558
    Click image for larger version. 

Name:	CC64FF1C-34CB-4F31-B6FC-C5DDE8036038.jpg 
Views:	136 
Size:	76.3 KB 
ID:	28041

    Time is supposedly relative, what is a few weeks in a 1Ghz core ��

  9. #559
    Junior Member
    Join Date
    Dec 2020
    Location
    Germany, near Munich
    Posts
    3
    Quote Originally Posted by mercury0x0d View Post
    Perhaps a 64-DIP footprint, as found on some older CPUs? The Motorola 68000, for example, came in this package, with versions sporting both the standard 2.54 mm pin pitch and a more condensed 1.78 mm pitch, for which adapters could be used to suit applications which originally called for the larger model.
    I love the idea a 68k footprint
    suitable sockets are available too.

  10. #560
    Senior Member
    Join Date
    Jan 2020
    Posts
    251
    Iíd like a teensy 4 with good quality analog inputs. Right now they are quite noisy.

  11. #561
    Senior Member
    Join Date
    Aug 2013
    Location
    Ohio
    Posts
    125

    NXP Kinetis analog: OK for medium precision...

    Quote Originally Posted by frankzappa View Post
    Iíd like a teensy 4 with good quality analog inputs. Right now they are quite noisy.
    My coworkers and I have been using Kinetis (K60, K61, approximately Teensy 3.6-generation) parts for a fairly large data acquisition system. During early design, we were optimistic that the board-space vs noise tradeoff would be acceptable. It is but just barely. We are finding that noise is an issue. If/when we do a future generation of the product we are seriously considering off-chip ADCs, using either SPI or I2S. That would allow us to shrink the analog signal chain to allow improved isolation of analog from digital signal paths.

    IMHO, NXP's decision to change the labeling of their ADCs from "16-bit" to "12-bit" is an indication of the challenges they face in integrating mixed signal analog and high speed digital circuitry. Integrated analog will likely be noisy for analog measurement beyond 12 or 13 bits ENOB ("effective number of bits").

    YMMV... For example, a project with low bandwidth requirements could use software-based signal conditioning to improve the picture.

  12. #562
    Senior Member
    Join Date
    Jan 2020
    Posts
    251
    Quote Originally Posted by LenSamuelson View Post
    My coworkers and I have been using Kinetis (K60, K61, approximately Teensy 3.6-generation) parts for a fairly large data acquisition system. During early design, we were optimistic that the board-space vs noise tradeoff would be acceptable. It is but just barely. We are finding that noise is an issue. If/when we do a future generation of the product we are seriously considering off-chip ADCs, using either SPI or I2S. That would allow us to shrink the analog signal chain to allow improved isolation of analog from digital signal paths.

    IMHO, NXP's decision to change the labeling of their ADCs from "16-bit" to "12-bit" is an indication of the challenges they face in integrating mixed signal analog and high speed digital circuitry. Integrated analog will likely be noisy for analog measurement beyond 12 or 13 bits ENOB ("effective number of bits").

    YMMV... For example, a project with low bandwidth requirements could use software-based signal conditioning to improve the picture.
    Yeah I also think it has to do with the separation of analog and digital components. The T3.6 has analog ground which the T4 doesnít have. I think paul said it wasnít possible to separate them.

    Iím getting around the problem with software filtering but it would have been even better to have both a clean signal AND filtering.

  13. #563
    Senior Member
    Join Date
    Jan 2014
    Posts
    111
    The teensy 4/ 4.1 schematics show there is a separate power pin for the ADC, and the iMXRT1060 (VDDA_ADC_3P3) which is also the voltage reference for the ADCs. documentation about it seems a bit contradictory though.

    NXP Semiconductors
    Data Sheet: Technical Data
    Document Number: IMXRT1060IEC
    Rev. 3, 03/2022

    1:Page 25

    VDDA_ADC_3P3 must be
    powered even if the ADC is not
    used.
    VDDA_ADC_3P3 cannot be
    powered when the other SoC
    supplies (except VDD_SNVS_IN)
    are off

    2: page 30

    NOTE
    USB_OTG1_VBUS, USB_OTG2_VBUS, and VDDA_ADC_3P3 are not
    part of the power supply sequence and may be powered at any time.

    Anyway, if the new chip has the same power scheme, it could get filtered power or even a separate "clean" regulator for that pin, and ADC performance would likely be less noisy. I can't really test it myself because the chip is BGA, and i don't want to destroy a teensy.

  14. #564
    Senior Member
    Join Date
    Jan 2020
    Posts
    251
    Quote Originally Posted by neutron7 View Post
    The teensy 4/ 4.1 schematics show there is a separate power pin for the ADC, and the iMXRT1060 (VDDA_ADC_3P3) which is also the voltage reference for the ADCs. documentation about it seems a bit contradictory though.

    NXP Semiconductors
    Data Sheet: Technical Data
    Document Number: IMXRT1060IEC
    Rev. 3, 03/2022

    1:Page 25

    VDDA_ADC_3P3 must be
    powered even if the ADC is not
    used.
    VDDA_ADC_3P3 cannot be
    powered when the other SoC
    supplies (except VDD_SNVS_IN)
    are off

    2: page 30

    NOTE
    USB_OTG1_VBUS, USB_OTG2_VBUS, and VDDA_ADC_3P3 are not
    part of the power supply sequence and may be powered at any time.

    Anyway, if the new chip has the same power scheme, it could get filtered power or even a separate "clean" regulator for that pin, and ADC performance would likely be less noisy. I can't really test it myself because the chip is BGA, and i don't want to destroy a teensy.
    HmmmÖ is this something one could test? I have a few spare teensies.

  15. #565
    Senior Member
    Join Date
    Apr 2018
    Location
    Eastern Time, USA
    Posts
    284
    @paulstoffregen Hi Paul, how is it going on this project? Are we likely to see boards in the coming months? There is some nifty stuff I am looking forward to using it for.

  16. #566
    Junior Member
    Join Date
    Apr 2022
    Posts
    6

    Power delivery idea for future Teensy 4.x

    Also, I'd love to see the possibility of getting more power out of the board via the USB port using the USB-PD standard or a STUSB4500 (or similar chip). Being able to power more stuff directly would be awesome!

  17. #567
    Senior Member+ MichaelMeissner's Avatar
    Join Date
    Nov 2012
    Location
    Ayer Massachussetts
    Posts
    4,370
    Quote Originally Posted by mercury0x0d View Post
    Also, I'd love to see the possibility of getting more power out of the board via the USB port using the USB-PD standard or a STUSB4500 (or similar chip). Being able to power more stuff directly would be awesome!
    I'm not Paul, but I suspect it won't go into the Teensy proper, as it likely will raise the costs that relatively few people would use.

    I've seen various USB C-PD trigger cables that when plugged into a USB C-PD system will ask for a fixed voltage (5v, 9v, 12v, 15v, 20v). Adafruit just announced their own version of the cables that ask for 5 amps at each of the different voltages. However, I don't recall any trigger cable that asks for specifically 5 volts (in order to get higher amps). If you need one of the other voltages for motors and such, then use that voltage and drop the voltage to 5 volts with a buck converter for the Teensy to use.

  18. #568
    Junior Member
    Join Date
    Mar 2022
    Posts
    7
    Quote Originally Posted by MichaelMeissner View Post
    I'm not Paul, but I suspect it won't go into the Teensy proper, as it likely will raise the costs that relatively few people would use.

    I've seen various USB C-PD trigger cables that when plugged into a USB C-PD system will ask for a fixed voltage (5v, 9v, 12v, 15v, 20v). Adafruit just announced their own version of the cables that ask for 5 amps at each of the different voltages. However, I don't recall any trigger cable that asks for specifically 5 volts (in order to get higher amps). If you need one of the other voltages for motors and such, then use that voltage and drop the voltage to 5 volts with a buck converter for the Teensy to use.
    It'd be trivial to add 5v/3a since there's an entire secondary microcontroller on the board. Hook up the required 5.1k resistors and measure the voltages to see if you can draw more than 500mA.

    If that cortex-m0+ KL02 has the space an entire PD stack could be loaded but you'd really want input protection.

  19. #569
    Senior Member+ manitou's Avatar
    Join Date
    Jan 2013
    Posts
    2,732
    Update to NXP 1170 SDK benchmarks (see post #494)

    CMSIS-NN (Neural Network) Library on NXP 1170
    CIFAR10 example
    Code:
    1170@996mhz  13818 us  SDK -O3  arm_math.h 1.6.0
    T4.0@600mhz  71102 us  Faster arm_math.h 1.5.3
    T3.6@180mhz 445994 us
    T3.5@120mhz 669922 us
    Earlier CMSIS-NN posts (T4 T3):
    https://forum.pjrc.com/threads/54711...l=1#post198355
    https://forum.pjrc.com/threads/53809...-on-Teensy-3-6

  20. #570
    Senior Member
    Join Date
    Apr 2018
    Location
    Eastern Time, USA
    Posts
    284
    I was just looking at the STM F7, 2.4MHz ADC, DAC, some offer 16 bits, and typically 1M each Ram and Flash. I think that might work out well for my uses, linear ccd and analog data acquisition with outputted waveform. Would it make sense to base a teensy product on that series?

  21. #571
    Senior Member
    Join Date
    Dec 2016
    Posts
    100
    Since wish dates are approaching... Would it be possible for the new teensy to come with a USB-C connector instead of the usual microUSB?

  22. #572
    Senior Member
    Join Date
    Apr 2018
    Location
    Eastern Time, USA
    Posts
    284
    I'll second that. USB-C please, it's time to put those old connectors to rest.

  23. #573
    Member
    Join Date
    May 2020
    Location
    South East England
    Posts
    24
    USB-C +1

    Also:
    It would be good for those of us wishing to squeeze the last ounce of performance from FreqCount() if the clock used could optionally be from an external precision source (See #555 in this thread)



  24. #574
    Junior Member
    Join Date
    Mar 2022
    Posts
    8
    Click image for larger version. 

Name:	wish.png 
Views:	32 
Size:	183.4 KB 
ID:	29900
    I'd personally like the future Teensy to use the 1176 which has the 2nd CPU and 2D GPU with Vector Acceleration and OpenVG capabilities.
    (i.MX RT1172 has only the 2D GPU. i.MX RT1173 has both the 2nd CPU and 2D GPU, but is Industrial only. i.MX RT1176 has both the 2nd CPU and 2D GPU.)
    Big wish, I know, since it would probably increase the cost by a lot. However, I feel like the future Teensy should have a 2D GPU at the very least using the 1172, if the 1176 is too expensive.

    (I read the entire thread and didn't see anyone else request this, so it probably won't happen. Though, it would be really cool to use OpenVG.)

  25. #575
    Senior Member
    Join Date
    Apr 2018
    Location
    Eastern Time, USA
    Posts
    284
    I can see an embedded application with high level graphics, the firestick for example. But at what point should we just get a pc?

    BTW, I have been working with the Teensy 4.0 this week, finally. It is absolutely fantastic! The faster usb makes all the difference in the world for me. And he ADC at 1usec/12bits is just fine for my work at the moment. If only it had a DAC...

Posting Permissions

  • You may not post new threads
  • You may not post replies
  • You may not post attachments
  • You may not edit your posts
  •