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Thread: Future Teensy features & pinout

  1. #76
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    I've a lot of 3.6 devices (hundreds) out whose computation power is used at their limit, so they need to run with single precision instead of double precision for most of their matrix operations.
    I actually use 5 out of 6 serial ports and my desire is to have almost the same pinout for serial ports than 3.6.

    Definitely, I wold like:
    1) Teensy 3. 5/6 pinout compatibility (as much as possible) and same PCB size.
    2) MicroSD socket.

    P.S.: Any possibility to have a wifi module on a future 4.x board?

  2. #77
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    I meant to suggest this earlier: pads on the bottom to provide access to the USB connector data pins. This allows for a design that has its own USB port for power/programming (USB-C anyone?)

  3. #78
    Senior Member+ MichaelMeissner's Avatar
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    I must admit that as we've had multiple threads about various castlelated pins and board extensions, it would be nice if there was an easier method for getting to the underneath pads with breakout boards. Particularly ones that can be easily manufactured. Perhaps having all of the pins in 0.1" (2.54mm) pitch so that we could use pogo pins or perhaps SMT pins like loglow/talldog used for the earlier Teensy breakouts.

  4. #79
    Senior Member+ MichaelMeissner's Avatar
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    Quote Originally Posted by blackketter View Post
    I meant to suggest this earlier: pads on the bottom to provide access to the USB connector data pins. This allows for a design that has its own USB port for power/programming (USB-C anyone?)
    Unfortunately, Paul has said that was a design choice due to wanting to run at USB 2.0/HI speed (480 Mbps) instead of USB 1.2/Full speed (12 Mbps) that the previous Teensys ran at. Evidently there was too much electrical interference if the pads were exposed.

  5. #80
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    Quote Originally Posted by PaulStoffregen View Post
    Robin deserves a lot of the credit. She does quite a lot of "infrastructure" stuff that makes everything else possible.
    so she is the glue that holds the whole thing together?

  6. #81
    Senior Member Blackaddr's Avatar
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    FORM FACTOR - keeping the T3.6 form factor would be great

    RAM - adding a big chunk of reasonably fast ram would be ideal. A single HyperRAM chip on board would be my suggestion in 64Mbit or 128Mbit variety. This will boost the BOM quite a bit so I think you might need to introduce two SKUs here where the RAM chip is not populated for very cost sensitive buyers who don't need the extra RAM. The FlexSPI memory mapping is pretty cool, but that's still some really slow RAM when compared to proper program memory. SPI RAM is best for certain types of data (LUTs) or low-speed streaming (like audio).

    CODEC - I really don't think having a codec on board is a good idea. While Audio is a huge user base for Teensy, it's also a very picky group who need to tailor their CODEC selection and preamp design to their particular needs. I know an SGTL5000 is inexpensive but I'm sure a lot of people don't want to pay for it on the BOM.

    SD Card - I don't use it personally on T3.6 but it always seemed to add a lot of value for very little BOM cost, really just costing PCB space more than anything else. Layout-wise, if it came down to the choice of a MicroSD card or space for an optional HyperRAM, I'd take the RAM.

  7. #82
    Senior Member PaulStoffregen's Avatar
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    Does anyone make HyperRAM other than Cypress? So far, all their chips I've seen are quite expensive.

  8. #83
    Senior Member Blackaddr's Avatar
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    Quote Originally Posted by PaulStoffregen View Post
    Does anyone make HyperRAM other than Cypress? So far, all their chips I've seen are quite expensive.
    ISSI is probably the cheapest alternative (well, a little bit cheaper than Cypress) ignoring all the Chinese-only market stuff. You can get 64Mbit for about $5 USD in production quantities. Would I recommend it being on every T4.1? No, that's a steep BOM price increase if the customer doesn't need it. However, my personal experience with edge devices is when the customer needs more RAM, it's a show-stopper so they're willing to pay a big premium. Hobbyists facing BGA only parts will also be highly motivated.

    That's why I recommend a dual SKU with populated vs unpopulated. For an extra 8Mbytes of medium speed (compared to OCM and SPI) I think a lot of customer wouldn't hesitate to pay a $10 to $20 premium because so far the alternative for larger RAM requires is to go overkill with an Rpi (which is no where near as easy and simple to use as a Teensy)

    Dual SKU might also open the flood-gates of people wanting all kind of customizable options which I don't think will work well with the lean business of PJRC, but RAM is such a common issue this would be the one exception I could see it making a large positive impact.

  9. #84
    Senior Member PaulStoffregen's Avatar
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    Is HyperRAM really worth so much more than QSPI in hobbyist-frields SOIC8 packages? Sure, it's 8 bits & DDR, where QSPI is 4 bits and only on the rising edge of the clock. Either way, you're waiting a long time for a cache miss. Or is there something I've missed about HyperRAM?

  10. #85
    Senior Member Blackaddr's Avatar
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    Quote Originally Posted by PaulStoffregen View Post
    Is HyperRAM really worth so much more than QSPI in hobbyist-frields SOIC8 packages? Sure, it's 8 bits & DDR, where QSPI is 4 bits and only on the rising edge of the clock. Either way, you're waiting a long time for a cache miss. Or is there something I've missed about HyperRAM?
    I don't think you're missing anything. Memory comes down capacity, latency and throughput (let's ignore power for now). So I guess it comes down to how much of your customer base needs something better than QSPI to justify the recurring costs in time, labour, parts to your business vs. the profit?

    - QSPI capacity is limited to about 512 Kbyte right now. Common HyperRAM is 8 Mbytes to 32 MBytes (64 to 256 Mbit)
    - Throughput is a big difference. QSPI is typically 40 MHz max, so max bandwidth is 40x4 = 160 Mbit/s = 20 Mbytes per second. HyperRAM is typically 100 or 166 MHz DDR 8-bit so 200/333 Mbytes/sec
    - latency on a cache miss would need to be characterized but for very small reads (one L1 cache line) the latency might be similar, HyperRAM could be faster but I won't go as far as say that. For larger transfers the increased speed starts to payoff much more.

    Back to power (per bit of storage, HyperRAM uses far less power than SPI SRAM because the former is DDR under the hood but handles the refresh for you.)

  11. #86
    If it is to express wishes ... I am a user who uses this type of plates to build one or another gadget with TFT's, I have reached the point of requiring a plate that in addition to speed, is compact, with enough pins and friendly in the arduino environment.

    I support the idea of ​​accessing a microSD reader in 4-bit mode, even if they are only solder pads, it is possible to manage to connect a reader there, you just have to have a lot of patience and surgeon's pulse!


  12. #87
    That's me sold on HyperRAM. How about RAM as an add-on daughter board? This would also allow pads to be placed on the T4 under the RAM board.

  13. #88
    Senior Member PaulStoffregen's Avatar
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    Quote Originally Posted by Blackaddr View Post
    - QSPI capacity is limited to about 512 Kbyte right now.
    8 MByte QSPI RAM chips are made by Chinese companies. I recently bought some for testing.

    Yes, HyperRAM is faster. But I'm skeptical it's worthwhile for most uses. Also from a business point of view, I'm reluctant to go much higher on cost when the market is filled with products like Raspberry Pi and ESP32.

  14. #89

    features

    I think it would be terrific if the USB connector was USB C.

    If there is a physical Ethernet port, I think it would be terrific if it could be POE.

    If there is a sdmicro, could you possibly consider sdmicro express form, if it becomes reality?

    thanks

  15. #90
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    Quote Originally Posted by random_number View Post
    If there is a sdmicro, could you possibly consider sdmicro express form, if it becomes reality?
    Should express form not be backward compatible, and therefore standard form would suffice, as long as MCU does not support express?

  16. #91
    Senior Member vjmuzik's Avatar
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    To support SD Express we would need PCIE which isn’t supported by these microcontroller processors as of yet and likely won’t be any time soon.

  17. #92
    Senior Member+ mjs513's Avatar
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    Quote Originally Posted by PaulStoffregen View Post
    8 MByte QSPI RAM chips are made by Chinese companies. I recently bought some for testing.

    Yes, HyperRAM is faster. But I'm skeptical it's worthwhile for most uses. Also from a business point of view, I'm reluctant to go much higher on cost when the market is filled with products like Raspberry Pi and ESP32.
    Poking around Google I found that Cypress makes these type chips: https://www.cypress.com/documentatio...i-flash-memory. They look really interesting.

  18. #93
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    Definitely a USB-C connector - Micro-B needs to die.

    Also, routing out the CAN-FD and, if possible, dropping the "bottom pads" concept completely would be great.

  19. #94
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    I'm fine with a double row of pins and/or a finer pitch. A RTOS and debugger would be nice.

  20. #95
    Def USB C connector,

  21. #96
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    I'll throw in my two cents that I agree with everyone saying that a Teensy 4.x that has a microSD card slot and a 3.6 pinout would be fantastic. I love the 3.6, but could really use more RAM and the higher clock speed of the 4.0.

    I have a couple of projects that I've made printed circuit boards that a T3.6 plugs into, and I love the idea of being able to upgrade them by dropping in a 4.x.

  22. #97
    Member randomvibe's Avatar
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    A T4.x in a 3.6 form factor would be great. It's somewhat surprising that the 3.2 form factor is the best-seller. I suppose price outweighs all. $19.XX is a bargain. If all form factors were the same price, I wonder if the 3.6 factor would win out? It's shocking that the BASIC Stamp 2 is still on sale, at $49.00, roughly $20 more than a 3.6 and $30 more than a 4.0!

  23. #98
    Senior Member PaulStoffregen's Avatar
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    PJRC is planning to make a 1062-based board in the Teensy 3.6 form factor. Time frame is "early 2020". Please discuss 1062-in-T36-form-factor on this thread:

    https://forum.pjrc.com/threads/58028...larger-Teensy4

    A 1170-based board will likely be near the end of 2020 or early 2021. NXP hasn't officially said when 1170 will be available in volume, but their general trend ~1 year after the initial "fact sheet" announcement.

    This thread is about the farther-future 1170...

  24. #99
    Wow the 1170 is a huge chip. 289 pin BGA. 3 x CAN FD. Routing would be a challenge.

    Would this be called Teensy 5.0 ?

  25. #100
    Senior Member PaulStoffregen's Avatar
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    No, it will be called Teensy 4.{something}.

    Just like Teensy 3.2 -> 3.6, even through it's a large step up in clock speed and comes with many new peripherals, it's still the same processor family with (mostly) compatible versions of the existing peripherals. So not considered a bump to the major version number.

    Teensy 5.0 will (probably) happen when we get chips with ARM Helium using architecture version 8. Today Cortex M3 to M7 are architecture version 7, and Cortex M0+ is architecture version 6.

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