Now that NXP has publicly announced the IMXRT1170 chip, we can finally start talking about far-future (late 2020) features and form factors and pinouts.

I'm definitely planning to make a larger form factor Teensy with the 1170 chip.

I'm also considering making Teensy 4.1 with the same chip (or 12 mm package size) as we have on Teensy 4.0, but in the Teensy 3.6 form factor so we can have access to more pins and features. If Teensy 4.1 is made (still "if" at this point), it would be early 2020 time frame.

Exactly which pins, what features (like a SD socket vs integrating an ethernet PHY vs maybe SGTL5000 or other codec on SAI3) and how to use the PCB real estate are pretty much a blank slate at this very early stage.

But one thing I'm not looking to do is an Intel Edison style high density connector for all or most of the I/O. The general format of 0.1 inch spacing for outside pins, and more-but-less-critical pins on bottom side pads will remain the basic idea of the Teensy form factor. But for 1170, if the PCB is larger, maybe we'll do dual-rows (similar to Beaglebone) with the outside rows meant to be primary signals for breadboard use. Maybe?

Still so many options to consider. Now that we can talk of 1170 without violating any NDAs, let the conversation begin!