Does Teensy 4.0 have an analog ground pin?

zapta

Well-known member
Looking at the pinout diagram, the T4 has a few grounds pins. Is one of them designated as analog ground?

I need to feed two non differential signals to the two ADCs and would like to know how to design the PCB to minimize noise.

Edit: alternatively, an external VREFL can also be used for this purpose, connected directly to the ground of the IC that provides the analog signal.
 
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On this topic, I've read that there is no external VREFh and there is only one comparison voltage, which is the 3v3 supply source. Is this correct?
 
... there is only one comparison voltage, which is the 3v3 supply ...

3.3v supply rail is a poor reference for a 12 bit A/D. Hope that there is a better way to provide reference for a 0 - 3.3V analog input range. (In my current application range up to 2.7V would also be acceptable).
 
They should all be pretty similar, since layer #2 inside the PCB is a ground plane and the chip has many GND pins.

But if you had to choose one, I'd suggest going with the GND on the right hand side (next to the Program pin).
 
Thanks Paul!

Regarding vref, what is the best possible vref setup I can use (internal or external)? My signal is single ended and the range 0.5V - 2.5V, coming from a ACS70331EESATR-2P5U3 nearby. My concern is that noise on the 3.3V rail will affect the ADC via vref.
 
Thanks Paul!

Regarding vref, what is the best possible vref setup I can use (internal or external)? My signal is single ended and the range 0.5V - 2.5V, coming from a ACS70331EESATR-2P5U3 nearby. My concern is that noise on the 3.3V rail will affect the ADC via vref.

I would also like to know if there is a programmable or precision internal vref. I read the 1620 data sheet but it was unclear how the reference function works - or if it was indeed programmable.
 
@zapta and &kjn, were you able to work out a vref for the Teensy 4.0 ? If so, please share details.

Thanks in advance,
Dan
 
@dan.col, didn't find a precision vref or analog ground. Just using the default configuration and performing in firmware basic signal filtering.
 
Sadly, NXP did not provide access to VREFH. They hard wired it directly to the GPIO power supply (3.3V on Teensy 4.0) inside the chip.
 
If absolute accuracy is required, one potential workaround may be do also doing an A/D reading of an external reference and calibrating the payload reading with that information. Assuming that the Vsupply didn't change much between those readings. Or just using an external A/D.
 
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