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Thread: Teensy 4.0 ADC

  1. #1
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    Teensy 4.0 ADC

    Hi, Is it correct than Teensy 4.0 ADC is only 10 bits effective, please?
    Anyway to have 12 bits?
    Best regards
    Fred
    * effectively only 10 bits of resolution in the ADCs (although the datasheet says 12 bit . . .)
    https://forum.pjrc.com/threads/57112...l=1#post211727

  2. #2
    Senior Member PaulStoffregen's Avatar
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    Yup, here's ENOB spec from page 64 in the datasheet.

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    Anyway to have 12 bits?
    Maybe collect and average together *many* more samples and hope the noise is Gaussian or otherwise evenly distributed.

    Also pay attention to the source impedance spec. If your source impedance is over 1K, expect things to be even worse.

    Or just call it 12 bits and pretend like you've never seen the ENOB spec? That's what pretty much every other company does when they quote their ADC capability. But PJRC tries to give you a honest estimate of the real-world capability, not some spec that implies better performance than you can actually get in practice.
    Last edited by PaulStoffregen; 10-07-2019 at 02:48 PM.

  3. #3
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    i have a pgm running that uses good sine generator and float fft to "test" the T4 adc
    doing 8 time domain data sets averaged with adc hardware averaging of 8, and
    HIGH_SPEED for t convert and t sample (using Bumblers' V0 ADC library (do search
    in technical for "adc" to find it)) i am getting a 78 db spurious free dynamic range
    in the passband (0-20khz) while oversampling at 250 khz. the dynamic range moves
    with the number of averages about as you would expect, and i am getting 13.1 ENOB
    under the above conditions and i am sure that if i was sampling more slowly it would
    go up from there. compile was 600 mhz faster.

    so i think that means that the noise and trash in the adc is fairly Gaussian and random.

    avoid VERY_HIGH_SPEED and hardware avg 16, dynamic range got 13 db worse.
    Last edited by analog&RFmodels; 10-16-2019 at 06:13 AM. Reason: clarity

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