T4 pixel pipeline and RGB parallel interface

[Spyy]

Hi,

I read in the fact sheet of the T4 MCU (1060) that the MCU has a pixel pipeline for 2d graphics and a RGB parallel interface...
My question is now if/how this is accessable in the actual T4 configuration and how does it work?

Thank you

Torsten

[vjmuzik]

While those are a feature of the chip I don’t believe all or any of the necessary pins are broken out to do those. I think in the thread about requested features of a future Teensy someone suggested those pins be available like they are on the RPi as a MIPI DSI interface, but at the moment there is no support for those features.

[Spyy]

Yes, i saw this thread...the next teensy will then be "the hammer"....