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Thread: Pins to bring out on a hypothetical larger Teensy4

  1. #26
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    very good idea - could even be extended to two break lines - like maybe dacs closest to cpu and 5v tolerance parts
    out on the end so that if you wanted dacs but didn't need 5v tolerance you use the break line furthest from the cpu
    and if you wanted neither you could use the break line closest to the cpu. i have no idea how practical that might be
    given number of copper layers in the board and layout restrictions.

  2. #27
    Senior Member+ mjs513's Avatar
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    Been playing with servos for a couple of projects and I know that this might be a sin but it would be nice if a few of the PWM pins could be 5v tolerant - know they all won't be but a few would be nice.

  3. #28
    Another idea... why not this?:

    Click image for larger version. 

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    I mean... why only 1 row on each side?

    Make it not longer... make it wider :-) Or make it longer + wider + cutable

    Then anyone can place pin headers where they want them.
    And then we never have a pinout problem!

    Be creative!

  4. #29
    Having only one row on each side means you can plug into a breadboard. Two rows you can't.

  5. #30
    Senior Member+ KurtE's Avatar
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    My $.02

    Allowing the board to be Cut or snapped:

    Having it, such that it can be cut or the like could create lots of other issues. Like, can you route this board in such a way that only those signals run into that area of the board.

    Plus what is the likelihood that cutting/breaking the board could create signal breaks or short or slight changes in signals... So suppose Paul did that, how many boards should we try to snap off the end would we need to do, in order to have a confidence level, that it did not completely screw things up...

    Multiple Rows:
    As for two rows, as mentioned you can not populate both rows and have it work on breadboard. However you can not do that today with T3.2 with bottom pads either. So as long as one understands the limitations...

    My Preferences:
    Make the layout of it as compatible with the T3.5/6, especially for all through hole connections, including the USB. That way in many cases one might be able to swap this new chip into boards created for the 3.6... Sort of like the FRDM castellated board converts the current T4 into that size package. If one or two DAC pins are added, it would be great if they went to where the DAC is on T3.6...

    Edit: also if space is available, maybe pins that correspond to the position of A10 and A11 on T3.5/6.

    As for additional pins that might be added beyond what fits into top pins... I am torn.

    One obvious choice is to see if we could add SMT pins on the bottom that align with one of the T3.6. Might in some cases be subsets, like if issue of getting the full 2x5 on end and a 2x4 works...

    Other option is to add additional Rows or columns of pins. But if for example if this changes the dimensions to be bigger than T3.6, this could easily cause it to not be a drop in replacement, as there may not be space on a current board.

    @Paul - But my strongest preference, is that it is a simple enhancement of the current T4, that does not require too much of your development time and testing time, such that you can start having the fun to figure out that next board with two different cores...

    But again that is only my $.02
    Last edited by KurtE; 11-21-2019 at 02:38 AM.

  6. #31
    My .02

    Keep it simple. Make the T4 in T3.6 format. Have a uSD holder and bring D24 to D33 to the through holes.

  7. #32
    Quote Originally Posted by skpang View Post
    Having only one row on each side means you can plug into a breadboard. Two rows you can't.
    At this time with the new Teensy 4.0 you can not use many pins with a breadboard, because they are on the back side :-)

    Outer 2nd Row: Breadboard is not a big problem... use an adapter board for breadboards (outer row with headers upside), or no adapter with headers upside for the outer row, and a 2nd Teensy for PCBs

    I think it would be better to go new ways. Old ways are too limited. An option were 2 versions, new and old.

    The good thing with the 2 rows is... you never have to solder anything on the back (PCB friendly :-)

  8. #33
    Quote Originally Posted by PaulStoffregen View Post
    I started exploring how the extra space might be used. Here's a quick concept drawing, with the added parts highlighted.

    Attachment 17964

    Switching to the larger 12mm chip (necessary for escaping more signals with an affordable PCB) and adding a USB host stuff (highlighted yellow) and SD socket similar to Teensy 3.6 uses up nearly all the space. I guess that's not too surprising, since Teensy 3.6 has a 13mm chip and not much room left over.

    At first it seemed impossible to fit an ethernet PHY and a connector. The 4mm LAN8720 chip I've used before just can't fit, unless the connector is extremely small (and fragile). Then I discovered Texas Instruments has a relatively new PHY chip that squeezes the PHY into only 3mm, using a rather strange QFN package. That allows a 2mm pitch through-hole header for the ethernet signals.

    One downside to the ethernet PHY chips is about 1 to 2 mA current in their lowest possible power down modes. Of course we'll still support the power on/off feature which will also shut off all power to the PHY.

    Which signals to assign to pins 34-41 is still a wide open decision. AD_B1_04, AD_B1_05, AD_B1_12, AD_B1_13 seem like reasonable candidates. That would give 16 bits of a port (though how useful that really is with the GPIO supporting only 32 bit access is questionable) and would also give 16 signals for FlexIO3 (perhaps much more useful). But those 4 pins are sort of lackluster in peripheral features, which is the reason they weren't included in the Teensy 4.0 pinout.

    Signals B1_12 & B1_13 would give us access to the last serial port (UART5). Or EMC_23 & EMC_24 could as well, if those signals are used for a place to add a memory chip (which would be on the bottom side - pads similar to the bottom side of the audio shield, but FlexSPI so the memory chip gets mapped into the ARM address space).

    This is all very tentative. Now is the time for feedback!
    ...all my dreams become true.....ethernet....thumbs up!!!

    Thank you

    Torsten

  9. #34
    The reader should remain in the orientation that teensy 3.6 has, it is more practical for the insertion / removal of the microSD card

  10. #35
    Senior Member+ MichaelMeissner's Avatar
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    Paul, out of curiousity, have you settled on what pins you are bringing out, and the pinouts involved? Would you be bringing out the pins currently underneath the Teensy similar to the various breakout boards floating around, or would you be bringing out new pins? Would even more pins be underneath the Teensy?

    If you are bringing out the current solder pads, it would be helpful if we could get people to think about everybody moving to a common pinout. Right now, each of the 3 main breakout boards use a different order and layout to get to the extra pads. Each has various advantages and disadvantages, but it may be helpful to have a common layout.

  11. #36
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    @Paul - any updates?

    Some things I am very curious about, is how compatible will the T4.? be with the T3.6 layout?

    Example can I drop in one of these instead of a T4 and use the USB host pins? That is will the pins be in same alignment and positioning? Your earlier picture looked like they are different?

    Likewise what about other Through hole pins on T3.5/6 like A10, A11, I can imagine AREF is problematic.

    Bottom SMT pins? Any that might be in same locations like T3.5/6 like ones under SDCARD (43-50)? ...

  12. #37
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    My preference is that teensys be small and inexpensive. Make a long breakout board for people who want to use lots of pins on a breadboard and make add-on boards for SD card, WIFI, etc. Double rows with the inner pins being fine pitch is fine (and better than bottom pads).

  13. #38
    Senior Member+ KurtE's Avatar
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    @jonr - we have a T4 that is small and inexpensive. But Paul asked what pins we might want in a T3.6 form factor as per post #1
    I'm considering making another Teensy4 with the same 1062 chip we have on Teensy 4.0, but in the Teensy 3.6 form factor.
    Edit: I meant to mention, that I am not in full disagreement, just that thread is geared toward T3.6 form factor for T4... There is another thread talking about future Teensy....

    Also: personally I sort of liked a lot about the Edison just hated the support (lack their of) and some of the details.
    Last edited by KurtE; 12-03-2019 at 06:13 PM.

  14. #39
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    Quote Originally Posted by jonr View Post
    My preference is that teensys be small and inexpensive. Make a long breakout board for people who want to use lots of pins on a breadboard and make add-on boards for SD card, WIFI, etc. Double rows with the inner pins being fine pitch is fine (and better than bottom pads).
    Well not everybody is comfortable with connecting such things. Like everything, there are always trade offs to be made. The more you go to smaller connections it can reduce the number of potential buyers.

    For example, one of the original reasons I went with Teensy when Paul did the original kickstarter campaign 7 years ago was he offered the Teensy 3.0 with pins already soldered onto the board. While I can now solder through hole and occasionally SOIC connections, I do struggle with smaller connections. I'm sure there are other tinkerers that are similarly solder challenged.

  15. #40
    Senior Member+ Frank B's Avatar
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    In addition to this nice board I'd like to see a non-teensy 1062 "breakout" with only the minimum needed parts for pjrc- USB-programming (+ needed decoupling) and way more pins. Maybe in a quadratic form-factor. So, yes, (c) PJRC, but non "normal" Teensy. This board would allow to use all features of the 1062. Just a breakout. Maybe even without Teensyduino-support ( This can be done by other, the community.. or.. a non Arduino- solution) for the currently unsupported features - this requires almost no engeneering efforts but allows consumers to use just the chip..
    Last edited by Frank B; 12-17-2019 at 11:51 AM.

  16. #41
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    ...and I'd like to use the display connectivity.

  17. #42
    Senior Member PaulStoffregen's Avatar
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    Quote Originally Posted by MichaelMeissner View Post
    Paul, out of curiousity, have you settled on what pins you are bringing out, and the pinouts involved
    Yes. It will be 42 pins, where 0 to 33 are the same pins as Teensy 4.0. The 8 new pins will be:

    Code:
    ---    ----       ----  ------    ---  ---     ---      ---   ----       ----    ------  ------
    Pin    Name       GPIO  Serial    I2C  SPI     PWM      CAN   Audio      XBAR    FlexIO  Analog
    ---    ----       ----  ------    ---  ---     ---      ---   ----       ----    ------  ------
    34     B1_13      2.29  UART5_RX                                                 2:29,3:29
    35     B1_12      2.28  UART5_TX                                                 2:28,3:28
    36     B1_02      2.18                 4:CS2   PWM2_A3        1:TX_BCLK  IO-16   2:18,3:18
    37     B1_03      2.19                 4:CS1   PWM2_B3        1:TX_SYNC  IO-17   2:19,3:19
    38     AD_B1_12   1.28                 3:CS                   1:rx_data          3:12    A2:1
    39     AD_B1_13   1.29                 3:MISO                 1:tx_data          3:13    A2:2
    40     AD_B1_04   1.20                                                           3:4     A1:13,A2:13
    41     AD_B1_05   1.21                         GPT2_1                            3:5     A1:14,A2:14
    This will give us 4 more analog pins, the 8th serial port, 2 more PWM. It also gives 16 continuous bits of GPIO2, though how useful that really is with this chip's 32 bit only GPIO registers remains to be seen.



    Quote Originally Posted by KurtE View Post
    Some things I am very curious about, is how compatible will the T4.? be with the T3.6 layout?

    Example can I drop in one of these instead of a T4 and use the USB host pins? That is will the pins be in same alignment and positioning?
    Only the outside 48 pins are in the same place.

    I could not fit the Ethernet hardware with the host connector in the same place. It had to move closer to the bottom pins to make room for the PHY chip and 6 pins.


    Likewise what about other Through hole pins on T3.5/6 like A10, A11, I can imagine AREF is problematic.
    Yup, no AREF in this chip, nor any analog-only pins.

    Even if there were, that also can't fit if the Ethernet hardware is consuming space on that area of the PCB.

    I can also say HyperRAM is *not* happening on Teensy 4.1. It's far too expensive. Maybe a huge company could take that kind of business risk in this crowded market of aggressively priced products (ESP32, Raspberry Pi Zero), but PJRC can't. However, it's still an open question for the 1170 board.


    Bottom SMT pins? Any that might be in same locations like T3.5/6 like ones under SDCARD (43-50)? ...
    Currently the plan is a pair of SOIC footprints where you can add memory chips. The use all the space under the SD card.

    Whether we get *any* extra bottom side SMT pads is a good question. This PCB is turning out to be a routing nightmare, and the main area that has pins open is on the opposite side of the chip from where bottom side pads might fit.



    Quote Originally Posted by jonr View Post
    Double rows with the inner pins being fine pitch is fine (and better than bottom pads).
    Quote Originally Posted by Frank B View Post
    In addition to this nice board I'd like to see a non-teensy 1062 "breakout" with only the minimum needed parts for pjrc- USB-programming (+ needed decoupling) and way more pins.
    I'll probably do something like this for the 1170-based board. The goal will be bringing out as much I/O as possible.

    For Teensy 4.1, we're locked into the close-to-T3.6 form factor. It won't bring much more I/O (perhaps just those 8 pins) but it will give access to native ethernet and 7 signals from the FlexSPI controller to add memory.

  18. #43
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    @PaulStoffregen

    Reading through your post, I think you are saying, no SDCard socket? Just want to be sure.

  19. #44
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    Cool

    Quote Originally Posted by mjs513 View Post
    @PaulStoffregen

    Reading through your post, I think you are saying, no SDCard socket? Just want to be sure.
    I would hope that the SD card socket of the Teensy 3.6 will be kept, and the pins that are currently 34-39 will be in that socket. If this is the case, I would suggest the new pins starting at 40, so there isn't any confusion, and the pins that connect to the SD card socket be 34-39 as before.

    Alternatively, having SOIC pads would allow either flash memory to be soldered instead of a SD card, or you could bring out those 8 pads and route them to a separate micro SD card reader.

    But I can understand at a high level the routing issues, and if we can't have the SD card, we can't have it. Having either flash memory or an SD card built-in is fairly useful. Hmmm, I wonder how much it would add to the cost of the board by having a flash memory chip soldered to where the SOIC pads would be.

    If we are using the same 1062 chip, we will need a new #define that says it is the chip with more pins.

  20. #45
    Senior Member+ KurtE's Avatar
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    @PaulStoffregen - I would love and hate your job You can never please everyone, but you can try...

    USB Host pins: Then hopefully they can be aligned in such a way that one could design a board that you could plug in either T3.6 or T4 and the holes won't interfere?

    @mjs513 - I believe there will be SDCard:
    Currently the plan is a pair of SOIC footprints where you can add memory chips. The use all the space under the SD card.
    It will be interesting to see how all of these thiings line up, and which things can be repurposed. Example the SOIC foot prints, maybe some adapter can be attached to bring out, likewise can one get access to any of the ethernet pins if one does not want/need ethernet...

    Again will be fun when we can get our hands on them!

  21. #46
    Senior Member PaulStoffregen's Avatar
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    Quote Originally Posted by MichaelMeissner View Post
    I would hope that the SD card socket of the Teensy 3.6 will be kept
    Yes, the SD socket is being kept. The board will look very similar to the image I shared on msg #11. The main chip has shifted slightly to the right to make room for the routing of signals to the ethernet PHY, and I rearranged thing a bit to use a larger flash chip, but otherwise it's going to look like that image.


    The pins that are currently 34-39 will be in that socket. If this is the case, I would suggest the new pins starting at 40, so there isn't any confusion, and the pins that connect to the SD card socket be 34-39 as before.
    I'm leaning towards the possibly confusing (if you're aware at all the SD pin on Teensy 4.0 can be accessed with pinMode/digitalWrite) scenario of having the new pins be 34-41, and then the SD pins would become 42-47.


    If we are using the same 1062 chip, we will need a new #define that says it is the chip with more pins.
    Yup. Right now with only about half the board routed, that seems like a very minor details a very long ways off.

  22. #47
    Senior Member PaulStoffregen's Avatar
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    Quote Originally Posted by KurtE View Post
    USB Host pins: Then hopefully they can be aligned in such a way that one could design a board that you could plug in either T3.6 or T4 and the holes won't interfere?
    They're offset by 75 mils vertical and 50 mils horizontal, so this can probably be done if you're willing to have pads packed tightly together.


    It will be interesting to see how all of these thiings line up, and which things can be repurposed. Example the SOIC foot prints, maybe some adapter can be attached to bring out
    These 7 signals will be fairly easy to access, if you're ok with SOIC pads at 50 mil (1.27 mm) pitch.

    Code:
    EMC_22  PWM3_B3         I2C3_SCL        ENET_TX_DATA0   QTIMER2_TIMER3  GPIO4:22  FLEXSPI2_A_SS1_B
    EMC_24  PWM1_B0         UART5_RX        ENET_TX_EN      GPT1_CAPTURE1   GPIO4:24  FLEXSPI2_A_SS0_B      
    EMC_25  PWM1_A1         UART6_TX        ENET_TX_CLK     ENET_REF_CLK    GPIO4:25  FLEXSPI2_A_SCLK
    EMC_26  PWM1_B1         UART6_RX        ENET_RX_ER      FlexIO1:12      GPIO4:26  FLEXSPI2_A_DATA00     
    EMC_27  PWM1_A2         UART5_RTS       SPI1_SCK        FlexIO1:13      GPIO4:27  FLEXSPI2_A_DATA01
    EMC_28  PWM1_B2         UART5_CTS       SPI1_MOSI       FlexIO1:14      GPIO4:28  FLEXSPI2_A_DATA02
    EMC_29  PWM3_A0         UART6_RTS       SPI1_MISO       FlexIO1:15      GPIO4:29  FLEXSPI2_A_DATA03

    , likewise can one get access to any of the ethernet pins if one does not want/need ethernet...
    These will be nearly impossible to access. The Ethernet PHY chip is placed close to the IMXRT. The routes are all very short. Some are on the top layer, mostly underneath the BGA. A few do make vertical jumps across the bottom side. But most of the routing is on layer 3 inside the PCB (6 layers). The PHY chip is a strange sort of QFN, so there is a tiny amount of each pad exposed, but accessing that would be quite difficult.

    But if you're curious, these are the signals which will connect to the Ethernet PHY.

    Code:
    B0_14   XBAR_INOUT12    ARM_CM7_EVENT0  SAI1_RX_SYNC    FlexIO2:14      GPIO2:14  Ethernet Reset
    B0_15   XBAR_INOUT13    ARM_CM7_EVENT1  SAI1_RX_BCLK    FlexIO2:15      GPIO2:15  Ethernet Powerdown    
    B1_04   SPI4_CS0        CSI_DATA15      ENET_RX_DATA0   FlexIO2:20      GPIO2:20  Ethernet RX0
    B1_05   SPI4_MISO       CSI_DATA14      ENET_RX_DATA1   FlexIO2:21      GPIO2:21  Ethernet RX1
    B1_06   SPI4_MOSI       CSI_DATA13      ENET_RX_EN      FlexIO2:22      GPIO2:22  Ethernet RXEN
    B1_07   SPI4_SCK        CSI_DATA12      ENET_TX_DATA0   FlexIO2:23      GPIO2:23  Ethernet TX0
    B1_08   QTIMER1_TIMER3  CSI_DATA11      ENET_TX_DATA1   FlexIO2:24      GPIO2:24  Ethernet TX1
    B1_09   QTIMER2_TIMER3  CSI_DATA10      ENET_TX_EN      FlexIO2:25      GPIO2:25  Ethernet TXEN
    B1_10   QTIMER3_TIMER3  CSI_DATA00      ENET_TX_CLK     FlexIO2:26      GPIO2:26  Ethernet CLK
    B1_11   QTIMER4_TIMER3  CSI_DATA01      ENET_RX_ER      FlexIO2:27      GPIO2:27  Ethernet RXER
    B1_14   PWM4_A2         CSI_HSYNC       XBAR_IN02       FlexIO2:30      GPIO2:30  Ethernet MDC
    B1_15   PWM4_A3         CSI_MCLK        XBAR_IN03       FlexIO2:31      GPIO2:31  Ethernet MDIO
    B0_14 and B0_15 will be used as ordinary GPIO, to control the PHY chip's reset and powerdown pins.

    If anyone's curious to read about the PHY chip, here's the info.

    http://www.ti.com/product/DP83825I

    This chip has some interesting features, but really the reason I chose it is because it's the only chip that physically fits! All the others (as least all the others I could find) are 4x4mm or larger.

  23. #48
    Senior Member+ Frank B's Avatar
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    Quote Originally Posted by PaulStoffregen View Post

    I'll probably do something like this for the 1170-based board. The goal will be bringing out as much I/O as possible.
    wow

  24. #49
    Senior Member+ MichaelMeissner's Avatar
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    Quote Originally Posted by PaulStoffregen View Post
    I'm leaning towards the possibly confusing (if you're aware at all the SD pin on Teensy 4.0 can be accessed with pinMode/digitalWrite) scenario of having the new pins be 34-41, and then the SD pins would become 42-47.
    But given that pins 34-39 are listed on the Teensy 4.0 pinout card, and the interest in the various 4.0 breakout shields, I suspect more people are aware of those pins than in the 3.6/3.5 boards. In the 3.6/3.5, those pins were not in the pinout card, and the only way to access them was via the SD card (or something that resembles the SD card).

    No matter which way you do it, I would ask for a macro defined for the new board that isn't defined for the Teensy 4.0. That way those of us who do have multiple Teensies can use #ifdef to refer to the appropriate pins. At the vary least, the SD libraries are going to need this, even if most users don't.

  25. #50
    Senior Member+ defragster's Avatar
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    Quote Originally Posted by MichaelMeissner View Post
    But given that pins 34-39 are listed on the Teensy 4.0 pinout card, and the interest in the various 4.0 breakout shields, I suspect more people are aware of those pins than in the 3.6/3.5 boards. In the 3.6/3.5, those pins were not in the pinout card, and the only way to access them was via the SD card (or something that resembles the SD card).

    No matter which way you do it, I would ask for a macro defined for the new board that isn't defined for the Teensy 4.0. That way those of us who do have multiple Teensies can use #ifdef to refer to the appropriate pins. At the vary least, the SD libraries are going to need this, even if most users don't.
    Indeed the 3 T4 breakouts seen/acquired all break those pins out for I/O by number - them being noted on the T4 card is another good avenue for confusion if both are in hand - and any SDIO aware library code would just work. Leaving the T4.1 mapping the same number going forward seems less likely to create problems, work or added #ifdef noise.

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