Guidance on feasibility of dual SPI MISO lines with Teensy

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hat

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Hi guys

I'm new to the Teensy world, so appologies if this is trivial.

I have an application where I need to use a high speed ADC. I'm using an LTC2341-18 Dual Simultaneous Sampling ADC.

Datasheet: https://www.analog.com/media/en/technical-documentation/data-sheets/234118f.pdf

I have managed to get sustained sample rate of just under 350ksps per channel with two channels active, using the SPI and clocking at around 38MHz, albeit there is some noise, which I'll try and fix later. This seems to be the maximum SPI clock rate on the Teensy 4, as the SPISettings ask for a 50MHz clock, but instead, I only get around 38MHz.

However, I would like to push the sample rate even further, and the ADC does allow higher throughput. The ADC has basically three SPI 'modes':

1. Single MISO CMOS SPI:- SCKI, SDI, SDO
2. Dual MISO CMOS SPI:- SCKI, SDI, SDO0, SDO1
3. LVDS SPI:- uses LVDS drivers to reduce noise.

To get more throughput, I'm thinking of making use of the dual, parallel, and simultaneous SDO (MISO) lines available. The issue is, both of the SDO lines are clocked with the same clock, and I don't know how best to implement that in Arduino - let alone if its possible.

I understand I would have to tweak the SPI.h library, but any guidance on what area to focus on, and the path to take would be greatly appreciated.

The forum post below touches on a similar situation but not quite the same.
https://forum.pjrc.com/threads/47183-2-simultaneous-SPI-communications-on-Teensy-for-a-Full-Duplex-System?p=157201&viewfull=1#post157201

I have attached the timing diagram of the ADC below.

timing.png
 
First in questions like this it might help if you actually stated which Teensy you are asking about? And for example which pins you are thinking about. I am assuming a T4 from your one comment.

But the simple answer is I don't think it is possible using the SPI. At least I have not seen any such ability... On any of these Teensy boards where you might see MISO0, MISO1... That typically implies there are more than one SPI buss on the chip. So
SPI has (MOSI, MISO, SCK, CS) marked on card. SPI1 has (MOSI1, MISO1, SCK1, CS1), SPI2... That is each SPI Buss has it's own MISO pin...

Now on T4 (as well as other boards), when you ask for speed of 50mhz the system tries to find the fastest speed it can run that does not exceed the speed that you passed in, where looks like 38mhz... There may be ways to bump this speed up, by mucking with which clock is passed into SPI subsystem...

However with T4, there may be another way to do this. That is using FLEXIO...

During the T4 beta, I played around some with it, and was able to create serial ports and an SPI port. The current stuff only does one (optional) MISO pin on it, but may be possible to add a second one. I also don't remember how fast I could get these to run...

My stuff I played with is up on github at: https://github.com/KurtE/FlexIO_t4

@Paul (if you read this thread) There are parts of it, that might be good to get into the core Teensyduino stuff, and also potentially the Serial port part of this could be used in something like SoftwareSerial...
 
Hi KurtE

Yeah, it is on a Teensy 4.0, apologies, I had included it in my first draft, but I had to rewrite the post.

I'll have a look at the FlexIO library. I presume you mean I can run at a faster clock on the FlexIO?

Thanks
 
What I was mentioning is it may be possible to get somewhat higher speeds on the main SPI.

I thought there as a thread within the last couple of days on this, but my searches show one from last month:
https://forum.pjrc.com/threads/57652-Teensy-4-SPI-bus-gt-38mhz-possible

There are 4 different clocks that can be fed into SPI subsystem. By default we are not choosing the fastest one...
There is code in SPI.begin which chooses the clock and then there is code in beginTransaction, which looks what clock is actually currently active and generates a divisor from its speed... So if you change the clock after the begin in theory it should go faster...

I am not sure why we did not choose the fastest one to begin with, but have been thinking about changing it to see if there are any issues.

As for FlexIO maybe going faster. I don't remember. Again it goes off of the clocks and then need to see how that all funnels down into FlexIO and then figure out how the different parts work... What I was saying is it could be possible to make a version of the FlexIO SPI code to have the two logical MISO pins.
 
What I was mentioning is it may be possible to get somewhat higher speeds on the main SPI.

I thought there as a thread within the last couple of days on this, but my searches show one from last month:
https://forum.pjrc.com/threads/57652-Teensy-4-SPI-bus-gt-38mhz-possible

There are 4 different clocks that can be fed into SPI subsystem. By default we are not choosing the fastest one...
There is code in SPI.begin which chooses the clock and then there is code in beginTransaction, which looks what clock is actually currently active and generates a divisor from its speed... So if you change the clock after the begin in theory it should go faster...

I am not sure why we did not choose the fastest one to begin with, but have been thinking about changing it to see if there are any issues.

As for FlexIO maybe going faster. I don't remember. Again it goes off of the clocks and then need to see how that all funnels down into FlexIO and then figure out how the different parts work... What I was saying is it could be possible to make a version of the FlexIO SPI code to have the two logical MISO pins.

Hi Kurt, is there any luck on "two logical MISO pins on the same SPI bus"?
 
Hi,
The general solution involves using two SPI ports - one working in master mode and one in slave mode on the microcontroller. Connect the CS and SCK outputs from the master to the CS and SCK inputs of the slave port. Connect one SDO output from the ADC to the MISO pin of the master SPI port, and the other SDO output to the MOSI pin of the slave port. You will find code for implementing SPI slave mode for the Teensy 4.0 if you search for it.
All the best,
Alan
 
@hat

Can you confirm the above method? Did you get the dual MISO SPI to work.

Im looking at the AD7387 ADC, with 4MSPS and up to 16bit resolution (when oversampling) for sampling a 1Mhz current sense amplifier. It has the same two MISO lines for faster throughput.
 
Hi KurtE

Just found this other thread where you mention the regular SPI ports might have DUAL capabilities. Did you find out, if the pins are broken out on the T4.0 or T4.1 for that?

HTML:
"Then there are the different normal SPI ports on the boards which we use for SPI, SPI1, SPI2, which are made up of LPSPI objects (Chapter 48). They are very different than FLEXSPI. And I believe they can all support Dual and Quad SPI stuff, however not all of the IO pins necessary to support these modes were exported on the Teensy. If I remember correctly maybe dual on the SPI object, but would need to look at pins again." Source : [url]https://forum.pjrc.com/threads/67436-Communicate-with-TFT-using-Dual-or-Quad-SPI-(QSPI)[/url]

The datasheet actually says, that MOSI can be configured as serial data input. "Used as data pin 0 in dual-data transfers"

LPSPI.jpg

LPSPI PINOUT

LPSPI PIN MUX.jpg

Best regards

Juan
 
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Again sorry I have never tried dual or quad spi modes on spi...

But if I understand correctly you have your normal full duplex spi, with Mosi and Miso... for output and input.

For dual spi mode, I believe you then go to half duplex and reuse these two pins for either input or output. So I would think you could do this on all of them spi ports.
But no support in spi library.

For quad mode, I believe data2 and data3 pins are the same as CS2 and CS3 on those ports and I don't believe any of these boards have exported a _PCS3 signal
 
I concur, in theory it should be possible to use the AD7387 on all three SPI ports. The CS pin triggers the sample and conversion and depending on settings the data is send on a single line or dual. So it will work like a normal SPI device, but has the option to go dual, when configured properly. It is definitely good to know when designing the carrier. Thx

Edit: hmm… the MOSI line still need to be connected to SDI (Slave data in), so essentially the SDOB/Alert line has to go to a secondary MISO. We can’t just change MOSI, since it will be occupied by SDI. Will have to deep dive into the pin mux table, I need the PCS(2) pin on one of the ports or a digital switch controlled by a GIO

I’m starting to see, why you would use two ports. One port for writing to the device, another port for the dual input mode.
 
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I wouldn't know, have no experience using flexio yet. I would think hardware SPI lines has some additional functionality. It would be a plus for Teensy 4.0 use, not having to use two SPI ports, even though it is broken out, the second port is on the bottom side SMD footprint.
 
Ah, I see it uses DMA and has some sophisticated timer, triggers, sync, so on and so forth. Would be worth a try. https://github.com/KurtE/FlexIO_t4

I see a use case for SimpleFoc FET pins on the same timer. Usually a challenge to find 6 pins on the same timer, if doing 6 pin PWM switching. Nice! Does it have dead time insertion?

PWM deadtime insertion.jpg
 
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Looking at your FlexIOSPI.cpp, it does look pretty configurable. Since the output of the AD7387 device is in sync on the two MISO lines, I suppose one would set up two DMA channels using the same trigger. Is that possible? The second MISO line would in a sense just be a clone of the first doing the exact same thing at the exact same time.

Just for future reference I think it’s wrong to call it dualSPI, since the lines in dualSPI or QuadSPI for that matter is bidirectional. It’s more fitting to call it triSPi
 
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