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Thread: T4.0 bytewide i/o ort

  1. #1
    Junior Member
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    May 2016
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    T4.0 bytewide i/o ort

    I've got an application right now that's using a bytewide output port on the Teensy 3.6, to ensure that all of the bits of output change at the same time. I managed to figure out how to find enough pins on GPIOD_PDOR to drive 8 signals. It involved some puzzling over the schematic.

    Is there a corresponding register on the T 4.0, that I can use like GPIOD_PDOR? The schematic shows ports that look like B0 and B1. Can I use them the same way, and what's the correct register name that I should use?

  2. #2
    Senior Member+ KurtE's Avatar
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    Jan 2014
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    For what it is worth, I do not believe that T4 boards support 8 bit or 16 bit outputs to the GPIO registers.

    @Paul mentioned this in the thread: https://forum.pjrc.com/threads/58028...l=1#post219037

  3. #3
    Junior Member
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    May 2016
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    Thanks. Since I don't need speed so much as simultaneity, I think it would probably be prudent for me to just use an octal latch. That way I'd be code compatible with any Teensy in the future.

    The stuff I'm doing is on the hairy edge of "just use an FPGA," but my FPGA training has only just begun.

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