Teensyduino 1.49 Beta #1

[Paul]

Here is a first beta test for Teensyduino 1.49.

USB optimization is the major change in this beta. I hope you'll have a moment to give the new optimized USB serial a try. I will soon start using this new optimized USB code as the basis for the many other USB types...


EDIT: links removed, please use 1.49-beta3


Changes since Teensyduino 1.48

Optimize USB serial on Teensy 4.0
Move USB serial buffers from ITCM to OCRAM on Teensy 4.0
Fix stalled USB serial transmit if multiple of 64 bytes on Teensy 4.0
Support different USB descriptors for 12 vs 480 speed on Teensy 4.0
Add FLASHMEM keyword
Arduino memory usage for Teensy 4.0 shows only RAM1 (512K) bank usage
Fix Audio lib delay effect maximum (2.4 sec) on Teensy 4.0
Fix missing ITCM padding from Teensy 4.0 memory usage
Fix empty code on Teensy 3.x if yield() overridden and no core lib functions used
Reduce DTCM memory usage by USB descriptors on Teensy 4.0
Fix USB transfer complete callbacks on Teensy 4.0
Fix Audio lib memory limit on Teensy 4.0
WS2812Serial add functions for better compatibility with Adafruit_NeoPixel
Windows teensy_serialmon (hopefully) doesn't lock up (but still too much buffering!)

[jonr]

Seems fine, even running the usb virtual serial as fast as possible (Linux).

[MichaelMeissner]

It would be nice if you can pull in the fix for teensy4/imrxt.h and the WS2812Serial library from KurtE to get WS2812Serial to work on the Teensy 4.0:

• https://forum.pjrc.com/threads/58442...l=1#post221769

[defragster]

Installed 1.49b1 over github cores on 1.8.10 : All seems good and well.

Improved USB Serial Receive code working fine.

RAM report looks different and about right - showing cross ref of KurtE/'Frank B' imxrt-size.exe:

Sketch uses 33440 bytes (1%) of program storage space. Maximum is 2031616 bytes.
Global variables use 45748 bytes (8%) of dynamic memory, leaving 478540 bytes for local variables. Maximum is 524288 bytes.

FlexRAM section ITCM+DTCM = 512 KB
    Config : aaaaaaab
    ITCM :  23776 B	(72.56% of   32 KB)
    DTCM :  12992 B	( 2.64% of  480 KB)
    Available for Stack: 478528
OCRAM: 512KB
    DMAMEM:  12384 B	( 2.36% of  512 KB)
    Available for Heap: 511904 B	(97.64% of  512 KB)
Flash:  33440 B	( 1.65% of 1984 KB)

[mjs513]

Installed on Windows10x64 with no problems.

Ran a couple simple usb serial tests.
Test 1 dumped three floats to the sermon with no delays in loop and it kept up with no issue.
Test 2: Used SerialPlotter to plot those same 3 numbers - basically hung the ide so I had to use task manager to kill the process.
Test 3: Retested SerialPlotter with a delayMicroseconds(100); in the loop. SerialPLottter kept up no problem.
Test 4: Ran @defragsters string print sketch from the other thread with a couple of various length strings:

1111111111111111111111111111111111111111
1111111111111111111111111111111111111111
1111111111111111111111111111111111111111
1111111111111111111111111111111111111111
111  | #=164

1111111111111111111111111111111111111111
1111111112222222222222222222222222222222
2222222222333333333333333333333333333333
3333333333333444444444444444444444444444
4444444444444444444444444455555555555555
5555555555555555555555555555555555555555
5555555556666666666666666666666666666666
6666666666666666666666666666666666666666
6666666666666666677777777777777777777777
7777777777777777777777777777777777888888
8888888888888888888888888888888888888888
8888888888888899999999999999999999999999
9999999999999999999999999999999900000000
0000000000000000000000000000000000000000
000  | #=564

Test 4: Multiple sends of 564 length string. (a) if I send slowly seems to work (tested with 15 sends), (b) if I send it repeatedly it seems to hang the Teensy and loose the port. (c) if I send multiple lengths strings of 451 seems to be no problem - couple of times I sent 901 length one and it didn't have a problem as long as I went back to 451 length string. Think I need to automate the process instead of fact fingering it.

EDIT: I would agree with Michael that it would be good if you could pull in the core PRs. Have to go back and put them back in again now.

[KurtE]

@Paul - great to see the USB stuff being updated! Trying to decide if there are enough people beating up on this and wait...

For now I may simple install fresh copy of Arduino 1.8.10 into new directory and do an install of this beta over it.

[PaulStoffregen]

Right now I'm working on support for MacOS Catalina. If there problems with the new USB serial, really hoping for test cases.

Will look at the USB stuff and merging things in a couple days, and then publish another beta... maybe even with a new Mac build...

[dukeblue219]

Great news about the USB. I'll check it out as soon as I can and see if the occasional stall has been fixed.

[cfredisded]

Fix Audio lib delay effect maximum (2.4 sec) on Teensy 4.0

So does the t4 allow longer then 2.4 sec delay?

[el_supremo]

The code in 1.49 B1 of effect_delay.h is:

#if defined(__IMXRT1062__)
  // 2.41 second maximum on Teensy 4.0
  #define DELAY_QUEUE_SIZE  (106496 / AUDIO_BLOCK_SAMPLES)
#elif defined(__MK66FX1M0__)
  // 2.41 second maximum on Teensy 3.6
  #define DELAY_QUEUE_SIZE  (106496 / AUDIO_BLOCK_SAMPLES)
#elif defined(__MK64FX512__)
  // 1.67 second maximum on Teensy 3.5
  #define DELAY_QUEUE_SIZE  (73728 / AUDIO_BLOCK_SAMPLES)
#elif defined(__MK20DX256__)
  // 0.45 second maximum on Teensy 3.1 & 3.2
  #define DELAY_QUEUE_SIZE  (19826 / AUDIO_BLOCK_SAMPLES)
#else
  // 0.14 second maximum on Teensy 3.0
  #define DELAY_QUEUE_SIZE  (6144 / AUDIO_BLOCK_SAMPLES)
#endif

which sets the delay queue length to the same size as in T3.6 (2.41 secs). In the previous version (TD 1.48), there was no #ifdef test for the T4.
I changed DELAY_QUEUE_SIZE to (220500 / AUDIO_BLOCK_SAMPLES) and then in the delay example sketch I increased AudioMemory to 1723. This allows me to extend the delayed time of the "bell" up to 5 seconds. With these values, OCRAM usage is:

OCRAM: 460896 B	(87.91% of  512 KB)

In principle, you could extend the (mono) delay to about 5.8 seconds but that would use all the OCRAM and might prevent your program loading

Pete

[cfredisded]

In principle, you could extend the (mono) delay to about 5.8 seconds but that would use all the OCRAM and might prevent your program loading

Thanks for clarifying that for me pete.

[fruitman]

This beta doesn't add support for USB keyboard on teensy 4.0 right? If not, is there any updated time estimate for this?

[defragster]

This beta doesn't add support for USB keyboard on teensy 4.0 right? If not, is there any updated time estimate for this?

I saw github CORES has first pass of T4 USB Keyboard checked in followed by mouse and joystick - likely out with Beta 2 when it is ready:

Add USB keyboard for Teensy 4.0 

Add USB mouse & joystick for Teensy 4.0

[PaulStoffregen]

Yes, I did the HID ones and I'm working on MIDI now. I did a few quick tests on keyboard, mouse and joystick. Touchscreen still needs more work.

My plan is for 1.49-beta2 within the next few days.

Planning to merge Kurt's work on WS2812Serial, and maybe some other stuff. Now's the time to remind me of stuff that should be merged for 1.49-beta2.

I want to finalize 1.49 before the end of 2019. So this week is probably the last opportunity for new features to get into 1.49.

[KurtE]

@PaulStoffregen... Sounds great.

There were a few other PR's out in special thread, like fixing some issues for Wire. @mjs513 has a nice version of the ST7735_t3 code base...

Wondering about things like ADC library? Currently for T4 we have been hacking on our own version that I am calling ADCL_t4... But it is starting to get more complete. Not sure what to do with libraries like this (ADC) again where owners are no longer active.

[KurtE]

@Paul was wondering about possible additions to IMXRT.h. That I have run into as part of the ADC port to T4 Things like:

ADC structure definition:
Which I currently have in the ADCL_t4 library: (https://github.com/KurtE/ADCL_t4)

typedef struct {
    volatile uint32_t HC0;
    volatile uint32_t HC1;
    volatile uint32_t HC2;
    volatile uint32_t HC3;
    volatile uint32_t HC4;
    volatile uint32_t HC5;
    volatile uint32_t HC6;
    volatile uint32_t HC7;
    volatile uint32_t HS; 
    volatile uint32_t R0; 
    volatile uint32_t R1; 
    volatile uint32_t R2; 
    volatile uint32_t R3; 
    volatile uint32_t R4; 
    volatile uint32_t R5; 
    volatile uint32_t R6; 
    volatile uint32_t R7; 
    volatile uint32_t CFG;
    volatile uint32_t GC; 
    volatile uint32_t GS; 
    volatile uint32_t CV; 
    volatile uint32_t OFS;
    volatile uint32_t CAL;
} IMXRT_ADCS_t;

#define IMXRT_ADC1S         (*(IMXRT_ADCS_t *)0x400C4000)
#define IMXRT_ADC2S         (*(IMXRT_ADCS_t *)0x400C8000)

Also looking into how to use Timed DMA reads as part of our ADC port. With PIT timer and DMA and XBAR to ADC_ETC...
Was finding in example app using magic numbers iwth XBAR mapping. So I hacked up a #define line as part of this, out of the PDF file ...

// XBAR1 Inputs and Outputs
#define XBAR1_IN_LOGIC_LOW 0
#define XBAR1_IN_LOGIC_HIGH 1
#define XBAR1_IN_IOMUX_XBAR_IN02 2
#define XBAR1_IN_IOMUX_XBAR_IN03 3
#define XBAR1_IN_IOMUX_XBAR_INOUT04 4
#define XBAR1_IN_IOMUX_XBAR_INOUT05 5
#define XBAR1_IN_IOMUX_XBAR_INOUT06 6
#define XBAR1_IN_IOMUX_XBAR_INOUT07 7
#define XBAR1_IN_IOMUX_XBAR_INOUT08 8
#define XBAR1_IN_IOMUX_XBAR_INOUT09 9
#define XBAR1_IN_IOMUX_XBAR_INOUT10 10
#define XBAR1_IN_IOMUX_XBAR_INOUT11 11
#define XBAR1_IN_IOMUX_XBAR_INOUT12 12
#define XBAR1_IN_IOMUX_XBAR_INOUT13 13
#define XBAR1_IN_IOMUX_XBAR_INOUT14 14
#define XBAR1_IN_IOMUX_XBAR_INOUT15 15
#define XBAR1_IN_IOMUX_XBAR_INOUT16 16
#define XBAR1_IN_IOMUX_XBAR_INOUT17 17
#define XBAR1_IN_IOMUX_XBAR_INOUT18 18
#define XBAR1_IN_IOMUX_XBAR_INOUT19 19
#define XBAR1_IN_IOMUX_XBAR_IN20 20
#define XBAR1_IN_IOMUX_XBAR_IN21 21
#define XBAR1_IN_IOMUX_XBAR_IN22 22
#define XBAR1_IN_IOMUX_XBAR_IN23 23
#define XBAR1_IN_IOMUX_XBAR_IN24 24
#define XBAR1_IN_IOMUX_XBAR_IN25 25
#define XBAR1_IN_ACMP1_OUT 26
#define XBAR1_IN_ACMP2_OUT 27
#define XBAR1_IN_ACMP3_OUT 28
#define XBAR1_IN_ACMP4_OUT 29
//#define XBAR1_IN_Reserved 30
//#define XBAR1_IN_Reserved 31
#define XBAR1_IN_QTIMER3_TIMER0 32
#define XBAR1_IN_QTIMER3_TIMER1 33
#define XBAR1_IN_QTIMER3_TIMER2 34
#define XBAR1_IN_QTIMER3_TIMER3 35
#define XBAR1_IN_QTIMER4_TIMER0 36
#define XBAR1_IN_QTIMER4_TIMER1 37
#define XBAR1_IN_QTIMER4_TIMER2 38
#define XBAR1_IN_QTIMER4_TIMER3 39
#define XBAR1_IN_FLEXPWM1_PWM1_OUT_TRIG0 40
#define XBAR1_IN_FLEXPWM1_PWM1_OUT_TRIG1 40
#define XBAR1_IN_FLEXPWM1_PWM2_OUT_TRIG0 41
#define XBAR1_IN_FLEXPWM1_PWM2_OUT_TRIG1 41
#define XBAR1_IN_FLEXPWM1_PWM3_OUT_TRIG0 42
#define XBAR1_IN_FLEXPWM1_PWM3_OUT_TRIG1 42
#define XBAR1_IN_FLEXPWM1_PWM4_OUT_TRIG0 43
#define XBAR1_IN_FLEXPWM1_PWM4_OUT_TRIG1 43
#define XBAR1_IN_FLEXPWM2_PWM1_OUT_TRIG0 44
#define XBAR1_IN_FLEXPWM2_PWM1_OUT_TRIG1 44
#define XBAR1_IN_FLEXPWM2_PWM2_OUT_TRIG0 45
#define XBAR1_IN_FLEXPWM2_PWM2_OUT_TRIG1 45
#define XBAR1_IN_FLEXPWM2_PWM3_OUT_TRIG0 46
#define XBAR1_IN_FLEXPWM2_PWM3_OUT_TRIG1 46
#define XBAR1_IN_FLEXPWM2_PWM4_OUT_TRIG0 47
#define XBAR1_IN_FLEXPWM2_PWM4_OUT_TRIG1 47
#define XBAR1_IN_FLEXPWM3_PWM1_OUT_TRIG0 48
#define XBAR1_IN_FLEXPWM3_PWM1_OUT_TRIG1 48
#define XBAR1_IN_FLEXPWM3_PWM2_OUT_TRIG0 49
#define XBAR1_IN_FLEXPWM3_PWM2_OUT_TRIG1 49
#define XBAR1_IN_FLEXPWM3_PWM3_OUT_TRIG0 50
#define XBAR1_IN_FLEXPWM3_PWM3_OUT_TRIG1 50
#define XBAR1_IN_FLEXPWM3_PWM4_OUT_TRIG0 51
#define XBAR1_IN_FLEXPWM3_PWM4_OUT_TRIG1 51
#define XBAR1_IN_FLEXPWM4_PWM1_OUT_TRIG0 52
#define XBAR1_IN_FLEXPWM4_PWM1_OUT_TRIG1 52
#define XBAR1_IN_FLEXPWM4_PWM2_OUT_TRIG0 53
#define XBAR1_IN_FLEXPWM4_PWM2_OUT_TRIG1 53
#define XBAR1_IN_FLEXPWM4_PWM3_OUT_TRIG0 54
#define XBAR1_IN_FLEXPWM4_PWM3_OUT_TRIG1 54
#define XBAR1_IN_FLEXPWM4_PWM4_OUT_TRIG0 55
#define XBAR1_IN_FLEXPWM4_PWM4_OUT_TRIG1 55
#define XBAR1_IN_PIT_TRIGGER0 56
#define XBAR1_IN_PIT_TRIGGER1 57
#define XBAR1_IN_PIT_TRIGGER2 58
#define XBAR1_IN_PIT_TRIGGER3 59
#define XBAR1_IN_ENC1_POS_MATCH 60
#define XBAR1_IN_ENC2_POS_MATCH 61
#define XBAR1_IN_ENC3_POS_MATCH 62
#define XBAR1_IN_ENC4_POS_MATCH 63
#define XBAR1_IN_DMA_DONE0 64
#define XBAR1_IN_DMA_DONE1 65
#define XBAR1_IN_DMA_DONE2 66
#define XBAR1_IN_DMA_DONE3 67
#define XBAR1_IN_DMA_DONE4 68
#define XBAR1_IN_DMA_DONE5 69
#define XBAR1_IN_DMA_DONE6 70
#define XBAR1_IN_DMA_DONE7 71
#define XBAR1_IN_AOI1_OUT0 72
#define XBAR1_IN_AOI1_OUT1 73
#define XBAR1_IN_AOI1_OUT2 74
#define XBAR1_IN_AOI1_OUT3 75
#define XBAR1_IN_AOI2_OUT0 76
#define XBAR1_IN_AOI2_OUT1 77
#define XBAR1_IN_AOI2_OUT2 78
#define XBAR1_IN_AOI2_OUT3 79
#define XBAR1_IN_ADC_ETC0_COCO0 80
#define XBAR1_IN_ADC_ETC0_COCO1 81
#define XBAR1_IN_ADC_ETC0_COCO2 82
#define XBAR1_IN_ADC_ETC0_COCO3 83
#define XBAR1_IN_ADC_ETC1_COCO0 84
#define XBAR1_IN_ADC_ETC1_COCO1 85
#define XBAR1_IN_ADC_ETC1_COCO2 86
#define XBAR1_IN_ADC_ETC1_COCO3 87

#define XBAR1_OUT_DMA_CH_MUX_REQ30 0
#define XBAR1_OUT_DMA_CH_MUX_REQ31 1
#define XBAR1_OUT_DMA_CH_MUX_REQ94 2
#define XBAR1_OUT_DMA_CH_MUX_REQ95 3
#define XBAR1_OUT_IOMUX_XBAR_INOUT04 4
#define XBAR1_OUT_IOMUX_XBAR_INOUT05 5
#define XBAR1_OUT_IOMUX_XBAR_INOUT06 6
#define XBAR1_OUT_IOMUX_XBAR_INOUT07 7
#define XBAR1_OUT_IOMUX_XBAR_INOUT08 8
#define XBAR1_OUT_IOMUX_XBAR_INOUT09 9
#define XBAR1_OUT_IOMUX_XBAR_INOUT10 10
#define XBAR1_OUT_IOMUX_XBAR_INOUT11 11
#define XBAR1_OUT_IOMUX_XBAR_INOUT12 12
#define XBAR1_OUT_IOMUX_XBAR_INOUT13 13
#define XBAR1_OUT_IOMUX_XBAR_INOUT14 14
#define XBAR1_OUT_IOMUX_XBAR_INOUT15 15
#define XBAR1_OUT_IOMUX_XBAR_INOUT16 16
#define XBAR1_OUT_IOMUX_XBAR_INOUT17 17
#define XBAR1_OUT_IOMUX_XBAR_INOUT18 18
#define XBAR1_OUT_IOMUX_XBAR_INOUT19 19
#define XBAR1_OUT_ACMP1_SAMPLE 20
#define XBAR1_OUT_ACMP2_SAMPLE 21
#define XBAR1_OUT_ACMP3_SAMPLE 22
#define XBAR1_OUT_ACMP4_SAMPLE 23
//#define XBAR1_OUT_Reserved 24
//#define XBAR1_OUT_Reserved 25
#define XBAR1_OUT_FLEXPWM1_PWM0_EXTA 26
#define XBAR1_OUT_FLEXPWM1_PWM1_EXTA 27
#define XBAR1_OUT_FLEXPWM1_PWM2_EXTA 28
#define XBAR1_OUT_FLEXPWM1_PWM3_EXTA 29
#define XBAR1_OUT_FLEXPWM1_PWM0_EXT_SYNC 30
#define XBAR1_OUT_FLEXPWM1_PWM1_EXT_SYNC 31
#define XBAR1_OUT_FLEXPWM1_PWM2_EXT_SYNC 32
#define XBAR1_OUT_FLEXPWM1_PWM3_EXT_SYNC 33
#define XBAR1_OUT_FLEXPWM1_EXT_CLK 34
#define XBAR1_OUT_FLEXPWM1_FAULT0 35
#define XBAR1_OUT_FLEXPWM1_FAULT1 36
#define XBAR1_OUT_FLEXPWM1_FAULT2 37
#define XBAR1_OUT_FLEXPWM2_FAULT2 37
#define XBAR1_OUT_FLEXPWM3_FAULT2 37
#define XBAR1_OUT_FLEXPWM4_FAULT2 37
#define XBAR1_OUT_FLEXPWM1_FAULT3 38
#define XBAR1_OUT_FLEXPWM2_FAULT3 38
#define XBAR1_OUT_FLEXPWM3_FAULT3 38
#define XBAR1_OUT_FLEXPWM4_FAULT3 38
#define XBAR1_OUT_FLEXPWM1_EXT_FORCE 39
#define XBAR1_OUT_FLEXPWM2_PWM0_EXTA 40
#define XBAR1_OUT_FLEXPWM3_PWM0_EXTA 40
#define XBAR1_OUT_FLEXPWM4_PWM0_EXTA 40
#define XBAR1_OUT_FLEXPWM2_PWM1_EXTA 41
#define XBAR1_OUT_FLEXPWM3_PWM1_EXTA 41
#define XBAR1_OUT_FLEXPWM4_PWM1_EXTA 41
#define XBAR1_OUT_FLEXPWM2_PWM2_EXTA 42
#define XBAR1_OUT_FLEXPWM3_PWM2_EXTA 42
#define XBAR1_OUT_FLEXPWM4_PWM2_EXTA 42
#define XBAR1_OUT_FLEXPWM2_PWM3_EXTA 43
#define XBAR1_OUT_FLEXPWM3_PWM3_EXTA 43
#define XBAR1_OUT_FLEXPWM4_PWM3_EXTA 43
#define XBAR1_OUT_FLEXPWM2_PWM0_EXT_SYNC 44
#define XBAR1_OUT_FLEXPWM2_PWM1_EXT_SYNC 45
#define XBAR1_OUT_FLEXPWM2_PWM2_EXT_SYNC 46
#define XBAR1_OUT_FLEXPWM2_PWM3_EXT_SYNC 47
#define XBAR1_OUT_FLEXPWM2_EXT_CLK 48
#define XBAR1_OUT_FLEXPWM3_EXT_CLK 48
#define XBAR1_OUT_FLEXPWM4_EXT_CLK 48
#define XBAR1_OUT_FLEXPWM2_FAULT0 49
#define XBAR1_OUT_FLEXPWM2_FAULT1 50
#define XBAR1_OUT_FLEXPWM2_EXT_FORCE 51
#define XBAR1_OUT_FLEXPWM3_EXT_SYNC0 52
#define XBAR1_OUT_FLEXPWM3_EXT_SYNC1 53
#define XBAR1_OUT_FLEXPWM3_EXT_SYNC2 54
#define XBAR1_OUT_FLEXPWM3_EXT_SYNC3 55
#define XBAR1_OUT_FLEXPWM3_FAULT0 56
#define XBAR1_OUT_FLEXPWM3_FAULT1 57
#define XBAR1_OUT_FLEXPWM3_EXT_FORCE 58
#define XBAR1_OUT_FLEXPWM4_EXT_SYNC0 59
#define XBAR1_OUT_FLEXPWM4_EXT_SYNC1 60
#define XBAR1_OUT_FLEXPWM4_EXT_SYNC2 61
#define XBAR1_OUT_FLEXPWM4_EXT_SYNC3 62
#define XBAR1_OUT_FLEXPWM4_FAULT0 63
#define XBAR1_OUT_FLEXPWM4_FAULT1 64
#define XBAR1_OUT_FLEXPWM4_EXT_FORCE 65
#define XBAR1_OUT_ENC1_PHASEA_INPUT 66
#define XBAR1_OUT_ENC1_PHASEB_INPUT 67
#define XBAR1_OUT_ENC1_INDEX 68
#define XBAR1_OUT_ENC1_HOME 69
#define XBAR1_OUT_ENC1_TRIGGER 70
#define XBAR1_OUT_ENC2_PHASEA_INPUT 71
#define XBAR1_OUT_ENC2_PHASEB_INPUT 72
#define XBAR1_OUT_ENC2_INDEX 73
#define XBAR1_OUT_ENC2_HOME 74
#define XBAR1_OUT_ENC2_TRIGGER 75
#define XBAR1_OUT_ENC3_PHASEA_INPUT 76
#define XBAR1_OUT_ENC3_PHASEB_INPUT 77
#define XBAR1_OUT_ENC3_INDEX 78
#define XBAR1_OUT_ENC3_HOME 79
#define XBAR1_OUT_ENC3_TRIGGER 80
#define XBAR1_OUT_ENC4_PHASEA_INPUT 81
#define XBAR1_OUT_ENC4_PHASEB_INPUT 82
#define XBAR1_OUT_ENC4_INDEX 83
#define XBAR1_OUT_ENC4_HOME 84
#define XBAR1_OUT_ENC4_TRIGGER 85
#define XBAR1_OUT_QTIMER1_TIMER0 86
#define XBAR1_OUT_QTIMER1_TIMER1 87
#define XBAR1_OUT_QTIMER1_TIMER2 88
#define XBAR1_OUT_QTIMER1_TIMER3 89
#define XBAR1_OUT_QTIMER2_TIMER0 90
#define XBAR1_OUT_QTIMER2_TIMER1 91
#define XBAR1_OUT_QTIMER2_TIMER2 92
#define XBAR1_OUT_QTIMER2_TIMER3 93
#define XBAR1_OUT_QTIMER3_TIMER0 94
#define XBAR1_OUT_QTIMER3_TIMER1 95
#define XBAR1_OUT_QTIMER3_TIMER2 96
#define XBAR1_OUT_QTIMER3_TIMER3 97
#define XBAR1_OUT_QTIMER4_TIMER0 98
#define XBAR1_OUT_QTIMER4_TIMER1 99
#define XBAR1_OUT_QTIMER4_TIMER2 100
#define XBAR1_OUT_QTIMER4_TIMER3 101
#define XBAR1_OUT_EWM_EWM_IN 102
#define XBAR1_OUT_ADC_ETC_TRIG00 103
#define XBAR1_OUT_ADC_ETC_TRIG01 104
#define XBAR1_OUT_ADC_ETC_TRIG02 105
#define XBAR1_OUT_ADC_ETC_TRIG03 106
#define XBAR1_OUT_ADC_ETC_TRIG10 107
#define XBAR1_OUT_ADC_ETC_TRIG11 108
#define XBAR1_OUT_ADC_ETC_TRIG12 109
#define XBAR1_OUT_ADC_ETC_TRIG13 110
#define XBAR1_OUT_LPI2C1_TRG_INPUT 111
#define XBAR1_OUT_LPI2C2_TRG_INPUT 112
#define XBAR1_OUT_LPI2C3_TRG_INPUT 113
#define XBAR1_OUT_LPI2C4_TRG_INPUT 114
#define XBAR1_OUT_LPSPI1_TRG_INPUT 115
#define XBAR1_OUT_LPSPI2_TRG_INPUT 116
#define XBAR1_OUT_LPSPI3_TRG_INPUT 117
#define XBAR1_OUT_LPSPI4_TRG_INPUT 118
#define XBAR1_OUT_LPUART1_TRG_INPUT 119
#define XBAR1_OUT_LPUART2_TRG_INPUT 120
#define XBAR1_OUT_LPUART3_TRG_INPUT 121
#define XBAR1_OUT_LPUART4_TRG_INPUT 122
#define XBAR1_OUT_LPUART5_TRG_INPUT 123
#define XBAR1_OUT_LPUART6_TRG_INPUT 124
#define XBAR1_OUT_LPUART7_TRG_INPUT 125
#define XBAR1_OUT_LPUART8_TRG_INPUT 126
#define XBAR1_OUT_FLEXIO1_TRIGGER_IN0 127
#define XBAR1_OUT_FLEXIO1_TRIGGER_IN1 128
#define XBAR1_OUT_FLEXIO2_TRIGGER_IN0 129
#define XBAR1_OUT_FLEXIO2_TRIGGER_IN1 130
//#define XBAR1_OUT_Reserved 131

// XBAR2 Inputs and Outputs
#define XBAR2_IN_LOGIC_LOW 0
#define XBAR2_IN_LOGIC_HIGH 1
//#define XBAR2_IN_Reserved 2
//#define XBAR2_IN_Reserved 3
//#define XBAR2_IN_Reserved 4
//#define XBAR2_IN_Reserved 5
#define XBAR2_IN_ACMP1_OUT 6
#define XBAR2_IN_ACMP2_OUT 7
#define XBAR2_IN_ACMP3_OUT 8
#define XBAR2_IN_ACMP4_OUT 9
//#define XBAR2_IN_Reserved 10
//#define XBAR2_IN_Reserved 11
#define XBAR2_IN_QTIMER3_TIMER0 12
#define XBAR2_IN_QTIMER3_TIMER1 13
#define XBAR2_IN_QTIMER3_TIMER2 14
#define XBAR2_IN_QTIMER3_TIMER3 15
#define XBAR2_IN_QTIMER4_TIMER0 16
#define XBAR2_IN_QTIMER4_TIMER1 17
#define XBAR2_IN_QTIMER4_TIMER2 18
#define XBAR2_IN_QTIMER4_TIMER3 19
#define XBAR2_IN_FLEXPWM1_PWM1_OUT_TRIG0 20
#define XBAR2_IN_FLEXPWM1_PWM1_OUT_TRIG1 20
#define XBAR2_IN_FLEXPWM1_PWM2_OUT_TRIG0 21
#define XBAR2_IN_FLEXPWM1_PWM2_OUT_TRIG1 21
#define XBAR2_IN_FLEXPWM1_PWM3_OUT_TRIG0 22
#define XBAR2_IN_FLEXPWM1_PWM3_OUT_TRIG1 22
#define XBAR2_IN_FLEXPWM1_PWM4_OUT_TRIG0 23
#define XBAR2_IN_FLEXPWM1_PWM4_OUT_TRIG1 23
#define XBAR2_IN_FLEXPWM2_PWM1_OUT_TRIG0 24
#define XBAR2_IN_FLEXPWM2_PWM1_OUT_TRIG1 24
#define XBAR2_IN_FLEXPWM2_PWM2_OUT_TRIG0 25
#define XBAR2_IN_FLEXPWM2_PWM2_OUT_TRIG1 25
#define XBAR2_IN_FLEXPWM2_PWM3_OUT_TRIG0 26
#define XBAR2_IN_FLEXPWM2_PWM3_OUT_TRIG1 26
#define XBAR2_IN_FLEXPWM2_PWM4_OUT_TRIG0 27
#define XBAR2_IN_FLEXPWM2_PWM4_OUT_TRIG1 27
#define XBAR2_IN_FLEXPWM3_PWM1_OUT_TRIG0 28
#define XBAR2_IN_FLEXPWM3_PWM1_OUT_TRIG1 28
#define XBAR2_IN_FLEXPWM3_PWM2_OUT_TRIG0 29
#define XBAR2_IN_FLEXPWM3_PWM2_OUT_TRIG1 29
#define XBAR2_IN_FLEXPWM3_PWM3_OUT_TRIG0 30
#define XBAR2_IN_FLEXPWM3_PWM3_OUT_TRIG1 30
#define XBAR2_IN_FLEXPWM3_PWM4_OUT_TRIG0 31
#define XBAR2_IN_FLEXPWM3_PWM4_OUT_TRIG1 31
#define XBAR2_IN_FLEXPWM4_PWM1_OUT_TRIG0 32
#define XBAR2_IN_FLEXPWM4_PWM1_OUT_TRIG1 32
#define XBAR2_IN_FLEXPWM4_PWM2_OUT_TRIG0 33
#define XBAR2_IN_FLEXPWM4_PWM2_OUT_TRIG1 33
#define XBAR2_IN_FLEXPWM4_PWM3_OUT_TRIG0 34
#define XBAR2_IN_FLEXPWM4_PWM3_OUT_TRIG1 34
#define XBAR2_IN_FLEXPWM4_PWM4_OUT_TRIG0 35
#define XBAR2_IN_FLEXPWM4_PWM4_OUT_TRIG1 35
#define XBAR2_IN_PIT_TRIGGER0 36
#define XBAR2_IN_PIT_TRIGGER1 37
#define XBAR2_IN_ADC_ETC0_COCO0 38
#define XBAR2_IN_ADC_ETC0_COCO1 39
#define XBAR2_IN_ADC_ETC0_COCO2 40
#define XBAR2_IN_ADC_ETC0_COCO3 41
#define XBAR2_IN_ADC_ETC1_COCO0 42
#define XBAR2_IN_ADC_ETC1_COCO1 43
#define XBAR2_IN_ADC_ETC1_COCO2 44
#define XBAR2_IN_ADC_ETC1_COCO3 45
#define XBAR2_IN_ENC1_POS_MATCH 46
#define XBAR2_IN_ENC2_POS_MATCH 47
#define XBAR2_IN_ENC3_POS_MATCH 48
#define XBAR2_IN_ENC4_POS_MATCH 49
#define XBAR2_IN_DMA_DONE0 50
#define XBAR2_IN_DMA_DONE1 51
#define XBAR2_IN_DMA_DONE2 52
#define XBAR2_IN_DMA_DONE3 53
#define XBAR2_IN_DMA_DONE4 54
#define XBAR2_IN_DMA_DONE5 55
#define XBAR2_IN_DMA_DONE6 56
#define XBAR2_IN_DMA_DONE7 57

#define XBAR2_OUT_AOI1_IN00 0
#define XBAR2_OUT_AOI1_IN01 1
#define XBAR2_OUT_AOI1_IN02 2
#define XBAR2_OUT_AOI1_IN03 3
#define XBAR2_OUT_AOI1_IN04 4
#define XBAR2_OUT_AOI1_IN05 5
#define XBAR2_OUT_AOI1_IN06 6
#define XBAR2_OUT_AOI1_IN07 7
#define XBAR2_OUT_AOI1_IN08 8
#define XBAR2_OUT_AOI1_IN09 9
#define XBAR2_OUT_AOI1_IN10 10
#define XBAR2_OUT_AOI1_IN11 11
#define XBAR2_OUT_AOI1_IN12 12
#define XBAR2_OUT_AOI1_IN13 13
#define XBAR2_OUT_AOI1_IN14 14

// XBAR3 Inputs and Outputs
#define XBAR3_IN_LOGIC_LOW 0
#define XBAR3_IN_LOGIC_HIGH 1
//#define XBAR3_IN_Reserved 2
//#define XBAR3_IN_Reserved 3
//#define XBAR3_IN_Reserved 4
//#define XBAR3_IN_Reserved 5
#define XBAR3_IN_ACMP1_OUT 6
#define XBAR3_IN_ACMP2_OUT 7
#define XBAR3_IN_ACMP3_OUT 8
#define XBAR3_IN_ACMP4_OUT 9
//#define XBAR3_IN_Reserved 10
//#define XBAR3_IN_Reserved 11
#define XBAR3_IN_QTIMER3_TIMER0 12
#define XBAR3_IN_QTIMER3_TIMER1 13
#define XBAR3_IN_QTIMER3_TIMER2 14
#define XBAR3_IN_QTIMER3_TIMER3 15
#define XBAR3_IN_QTIMER4_TIMER0 16
#define XBAR3_IN_QTIMER4_TIMER1 17
#define XBAR3_IN_QTIMER4_TIMER2 18
#define XBAR3_IN_QTIMER4_TIMER3 19
#define XBAR3_IN_FLEXPWM1_PWM1_OUT_TRIG0 20
#define XBAR3_IN_FLEXPWM1_PWM2_OUT_TRIG0 21
#define XBAR3_IN_FLEXPWM1_PWM3_OUT_TRIG0 22
#define XBAR3_IN_FLEXPWM1_PWM4_OUT_TRIG0 23
#define XBAR3_IN_FLEXPWM2_PWM1_OUT_TRIG0 24
#define XBAR3_IN_FLEXPWM2_PWM2_OUT_TRIG0 25
#define XBAR3_IN_FLEXPWM2_PWM3_OUT_TRIG0 26
#define XBAR3_IN_FLEXPWM2_PWM4_OUT_TRIG0 27
#define XBAR3_IN_FLEXPWM3_PWM1_OUT_TRIG0 28
#define XBAR3_IN_FLEXPWM3_PWM2_OUT_TRIG0 29
#define XBAR3_IN_FLEXPWM3_PWM3_OUT_TRIG0 30
#define XBAR3_IN_FLEXPWM3_PWM4_OUT_TRIG0 31
#define XBAR3_IN_FLEXPWM4_PWM1_OUT_TRIG0 32
#define XBAR3_IN_FLEXPWM4_PWM2_OUT_TRIG0 33
#define XBAR3_IN_FLEXPWM4_PWM3_OUT_TRIG0 34
#define XBAR3_IN_FLEXPWM4_PWM4_OUT_TRIG0 35
#define XBAR3_IN_PIT_TRIGGER0 36
#define XBAR3_IN_PIT_TRIGGER1 37
#define XBAR3_IN_ADC_ETC0_COCO0 38
#define XBAR3_IN_ADC_ETC0_COCO1 39
#define XBAR3_IN_ADC_ETC0_COCO2 40
#define XBAR3_IN_ADC_ETC0_COCO3 41
#define XBAR3_IN_ADC_ETC1_COCO0 42
#define XBAR3_IN_ADC_ETC1_COCO1 43
#define XBAR3_IN_ADC_ETC1_COCO2 44
#define XBAR3_IN_ADC_ETC1_COCO3 45
#define XBAR3_IN_ENC1_POS_MATCH 46
#define XBAR3_IN_ENC2_POS_MATCH 47
#define XBAR3_IN_ENC3_POS_MATCH 48
#define XBAR3_IN_ENC4_POS_MATCH 49
#define XBAR3_IN_DMA_DONE0 50
#define XBAR3_IN_DMA_DONE1 51
#define XBAR3_IN_DMA_DONE2 52
#define XBAR3_IN_DMA_DONE3 53
#define XBAR3_IN_DMA_DONE4 54
#define XBAR3_IN_DMA_DONE5 55
#define XBAR3_IN_DMA_DONE6 56
#define XBAR3_IN_DMA_DONE7 57

#define XBAR3_OUT_AOI2_IN00 0
#define XBAR3_OUT_AOI2_IN01 1
#define XBAR3_OUT_AOI2_IN02 2
#define XBAR3_OUT_AOI2_IN03 3
#define XBAR3_OUT_AOI2_IN04 4
#define XBAR3_OUT_AOI2_IN05 5
#define XBAR3_OUT_AOI2_IN06 6
#define XBAR3_OUT_AOI2_IN07 7
#define XBAR3_OUT_AOI2_IN08 8
#define XBAR3_OUT_AOI2_IN09 9
#define XBAR3_OUT_AOI2_IN10 10
#define XBAR3_OUT_AOI2_IN11 11
#define XBAR3_OUT_AOI2_IN12 12
#define XBAR3_OUT_AOI2_IN13 13
#define XBAR3_OUT_AOI2_IN14 14
#define XBAR3_OUT_AOI2_IN15 15

Are these things we should add to imxrt.h?

I can do, and issue PR if that makes sense...

[PaulStoffregen]

Not sure what to do with libraries like this (ADC) again where owners are no longer active.

I'm not quite sure either....

Are these things we should add to imxrt.h?

I can do, and issue PR if that makes sense...

Yes, please do.

But do not delete the already defined full register names. Convert them to the new struct. I believe there's at least one pull request still pending which I haven't merged because it deletes the original register names. I'll go back and look at it and others again, after I get USB MIDI working.

[KurtE]

Yes, please do.

But do not delete the already defined full register names. Convert them to the new struct. I believe there's at least one pull request still pending which I haven't merged because it deletes the original register names. I'll go back and look at it and others again, after I get USB MIDI working.

Will do.

I for sure would not delete the old defines. Have two choices, both ways are in imxrt.h.

That is could redefine all them as reflecting the new structure: like with I2C...

} IMXRT_LPI2C_t;
#define IMXRT_LPI2C1		(*(IMXRT_LPI2C_t *)0x403F0000)
#define LPI2C1_VERID			(IMXRT_LPI2C1.VERID)
#define LPI2C1_PARAM			(IMXRT_LPI2C1.PARAM)
#define LPI2C1_MCR			(IMXRT_LPI2C1.MCR)
#define LPI2C1_MSR			(IMXRT_LPI2C1.MSR)
#define LPI2C1_MIER			(IMXRT_LPI2C1.MIER)

Or others just left in the old offset way like:

#define IMXRT_FLEXIO1_S         (*(IMXRT_FLEXIO_t *)0x401AC000)
#define IMXRT_FLEXIO2_S         (*(IMXRT_FLEXIO_t *)0x401B0000)
#define IMXRT_FLEXIO3_S         (*(IMXRT_FLEXIO_t *)0x42020000)

#define IMXRT_FLEXIO1		(*(IMXRT_REGISTER32_t *)0x401AC000)
#define IMXRT_FLEXIO1_b		(*(IMXRT_REGISTER32_t *)0x401AC400)
#define FLEXIO1_VERID			(IMXRT_FLEXIO1.offset000)
#define FLEXIO1_PARAM			(IMXRT_FLEXIO1.offset004)
#define FLEXIO1_CTRL			(IMXRT_FLEXIO1.offset008)
#define FLEXIO1_PIN			(IMXRT_FLEXIO1.offset00C)
#define FLEXIO1_SHIFTSTAT		(IMXRT_FLEXIO1.offset010)
#define FLEXIO1_SHIFTERR		(IMXRT_FLEXIO1.offset014)

Preference. Obviously just leaving the old defines is simpler (and maybe safer), but the using the structure does look cleaner...

[PaulStoffregen]

That is could redefine all them as reflecting the new structure: like with I2C...

Yes, this.

The other ones with a dedicated struct typedef has (mostly) been done that way.

Eventually we'll probably get rid of all the old offset stuff. I did that before the beta test because it was much faster and easier to compare with the tables in NXP's reference manual. Even then it took over a week to make the first header file with all the registers.

[KurtE]

Ok I edited it like you mentioned...

You might want to take a look, to make sure I did not screw up something.
https://github.com/PaulStoffregen/cores/pull/406

[mjs513]

But do not delete the already defined full register names. Convert them to the new struct. I believe there's at least one pull request still pending which I haven't merged because it deletes the original register names. I'll go back and look at it and others again, after I get USB MIDI working.

Paul I think you are referring to the PR I did for the Encoder registers. Based on your preference I will redo the structure and ensure it retains the original register names. May have to do a little work on the lib but not too bad. Will use what Kurt did for ADC as the model.

EDIT: PR Updated.

[defragster]

Paul I think you are referring to the PR I did for the Encoder registers. Based on your preference I will redo the structure and ensure it retains the original register names. May have to do a little work on the lib but not too bad. Will use what Kurt did for ADC as the model.

This came to mind: github.com/ftrias/TeensyThreads/pull/21

… Defragster commented 28 days ago ...
Current PJRC/CORES :: CCM_CCGR1_GPT became CCM_CCGR1_GPT1_BUS
See : PaulStoffregen/cores@17d54c5
Noted on thread : https://forum.pjrc.com/threads/54711...l=1#post221044

Also note :: This branch [ PaulStoffregen/TeensyThreads {Latest commit on Aug 22, 2017} ] is 19 commits behind ftrias:master.

[MichaelMeissner]

@PaulStoffregen... Sounds great.

There were a few other PR's out in special thread, like fixing some issues for Wire. @mjs513 has a nice version of the ST7735_t3 code base...

Wondering about things like ADC library? Currently for T4 we have been hacking on our own version that I am calling ADCL_t4... But it is starting to get more complete. Not sure what to do with libraries like this (ADC) again where owners are no longer active.

If we are going to update ST7735_T3 from mjs513's new changes, would it be possible to add the two uncanny eyes examples that mjs513 had in his tree to the Teensy version? I believe KurtE, and defragster worked on it (maybe I had changes in that as well)? Given that the developer has essentially moved on to the newer Adafruit M4 boards with a whole new source base, it would be useful to have both T3.x and T4 versions for people to use.

[defragster]

Paul - this millis() issues on certain set_arm_clock transitions. See: pjrc.com/threads/58053-T4-set_arm_clock-and-micros()

Title says micros() but that is because it tracks on millis() clocking.

[PaulStoffregen]

If we are going to update ST7735_T3 from mjs513's new changes, would it be possible to add the two uncanny eyes examples that mjs513 had in his tree to the Teensy version?

Yes. Please send a pull request. Will probably be in 1.49-beta3, since I'm about to package up beta2...