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Thread: Teensy 4.0 Clock speed influences delay and SPI

  1. #1

    Teensy 4.0 Clock speed influences delay and SPI

    Im trying to get sensor data from an MPU9250 over SPI bus 0 (SS pin is 33, ive tried 10 but got the same result) using Bolderflights Library for the MPU9250. Currently the Library seems to only be successful when i choose a clock speed between 24mhz and 396mhz. And if it does run then the delay functions seem to be much shorter than they should be. Im seeing these problems with all of the example sktches. Ive tried hooking the sensor up over I2C but that doesnt seem to work at all. Ive also noticed that if im running the FIFO example sketch and get it running with any working clockspeed the data from the Accel seems correct but if i enable anything else (gyro, magnetometer etc, even other sensors using other libraries) the accel data seems to be incorrect (saying 100m/s^2) and are effected by the gyroscope (so rotating the sensor changes the values heavily). Last thing is if i use the library with an ESP32 im notting getting the SPI problems but the false data issue is the same.
    Any help would be great.

  2. #2
    Hi Chris,
    I also came across similar issue, In my case I am not able to use delay functions as simple delay as it changes based on CPU Speed.

  3. #3
    Senior Member+ KurtE's Avatar
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    With things like, this it would be beneficial if you might provide some additional information,

    Like pointers to the actual hardware you are using, and likewise library: Is it this one? https://github.com/bolderflight/MPU9250
    Also simple example sketch that shows the issue.

    The github page has links to some teensy products, but the pages don't exist.

    If it were me, some of the things I would experiment with are the SPI Speeds, that is the header file has:
    Code:
        const uint32_t SPI_LS_CLOCK = 1000000;  // 1 MHz
        const uint32_t SPI_HS_CLOCK = 15000000; // 15 MHz
    So that the SPI speed should not change (much) depending on CPU speed. The (much) is that these requests for CPU speed are MAX values to SPI. And the actual speed depends on the CPU, where the system computes the closest speed (that does not exceed) that it can give you typically depending on some divisor of on of the system clocks....

    So for example if you ask for 1mhz on some processors running at certain speeds it will give you 1mhz, where at other speeds it may give you something like 800khz or something like that.

    Also looks like it uses SPI mode 3... Anything else hooked up on that SPI port? Sometimes there is issue of switching SPI modes, where it may not convert until first byte output at the new mode is output...

    But again guessing.

  4. #4
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    > use delay functions as simple delay as it changes based on CPU Speed

    For me, delay() is correct independent of CPU speed.

  5. #5
    Senior Member PaulStoffregen's Avatar
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    Tested just now. Looks like delay() is broken when running at 24 MHz. Seems to work fine at all the other speeds.

  6. #6
    Senior Member PaulStoffregen's Avatar
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    Looks like the bug is within the calculations done in micros(). It seems to be happening at 150 MHz and lower, but only badly enough at 24 MHz to mess up delay().

    Here's a test case to easily see the problem.

    Code:
    uint32_t prior = 0;
    
    void loop() {
      uint32_t usec = micros();
      if (prior > usec) {
        // time should never go backwards, this should print only at 32 bit rollover
        Serial.printf("%u -> %u\n", prior, usec);
      }
      prior = usec;
    }
    
    void setup() {
    }

  7. #7
    Senior Member PaulStoffregen's Avatar
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    @defragster - Do you remember where this micros() code originated? I believe it was contributed near the end of the T4 beta (while my attention was focused on a ton of hardware & manufacturing issues).

  8. #8
    Senior Member+ mjs513's Avatar
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    Quote Originally Posted by PaulStoffregen View Post
    @defragster - Do you remember where this micros() code originated? I believe it was contributed near the end of the T4 beta (while my attention was focused on a ton of hardware & manufacturing issues).
    Know you asked @defragster this but think it goes back further. Found a couple of posts in the beta thread that might be of interest:
    https://forum.pjrc.com/threads/54711...l=1#post195671
    https://forum.pjrc.com/threads/54711...l=1#post202101
    https://forum.pjrc.com/threads/54711...l=1#post196951
    A lot going on in that time frame - I do remember there was more testing after march as well.
    Last edited by mjs513; 12-15-2019 at 01:02 AM.

  9. #9
    Senior Member PaulStoffregen's Avatar
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    Back then we were only really using 600 MHz speed, as I recall.

    I'm digging deeper into this issue. Starting to look like we might not actually be running at 24 MHz. Might really be 30 MHz. Very mysterious....

  10. #10
    Senior Member+ mjs513's Avatar
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    Quote Originally Posted by PaulStoffregen View Post
    Back then we were only really using 600 MHz speed, as I recall.

    I'm digging deeper into this issue. Starting to look like we might not actually be running at 24 MHz. Might really be 30 MHz. Very mysterious....
    You are right about the 600Mhz. Even if we changed the clock speed in startup we never went down to 24 mhz.

    The funny thing about 24mhz is isn't that considered the clock for low-power mode. Know @manitou and I played with that mode on the 1060 sdk with their associated app. Maybe there is something associated with that - was looking at https://www.nxp.com/docs/en/applicat...te/AN12085.pdf

  11. #11
    Senior Member+ mjs513's Avatar
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    @PaulStoffregen

    Way back when we first started I wrote an app that displayed all clocks (one of my first endeavors with the T4). I decided to dust it off and run it to see what it dumped out:

    At 24Mhz its indicating the CPU clock is at 30Mhz as you said:
    Code:
    System Clock: 30000000
    IPG Clock: 30000000
    Semc Clock: 40000000
    RTC Clock: 32768
    USB1pll Clock: 480000000
    System Clock: 30000000
    0
    VideoPll Clock: 0
    e��{���Osc Clock: 24000000
    Arm Clock: 672000000
    Usb1PllPfd0 Clock: 720000000
    Usb1PllPfd1 Clock: 664615368
    Usb1PllPfd2 Clock: 508235292
    Usb1PllPfd3 Clock: 454736826
    Usb1PllPfd0 Clock: 720000000
    k: 32768
    
    �f#�㐙c����E�vSysPll Clock: 528000000
    SysPllPfd0 Clock: 351999990
    SysPllPfd1 Clock: 594000000
    SysPllPfd2 Clock: 396000000
    SysPllPfd3 Clock: 297000000
    EnetPll0 Clock: 0
    EnetPll1 Clock: 0
    AudioPll Clock: 786480000
    VideoPll Clock: 0
    not sure why its printing out gibberish but maybe I changed something in printing. Here it is at 150Mhz
    Code:
    System Clock: 151200000
    IPG Clock: 75600000
    Semc Clock: 50400000
    RTC Clock: 32768
    USB1pll Clock: 480000000
    Peripheral Clock: 24000000
    Osc Clock: 24000000
    Arm Clock: 756000000
    Usb1PllPfd0 Clock: 720000000
    Usb1PllPfd1 Clock: 664615368
    Usb1PllPfd2 Clock: 508235292
    Usb1PllPfd3 Clock: 454736826
    Usb2Pll Clock: 24000000
    SysPll Clock: 528000000
    SysPllPfd0 Clock: 351999990
    SysPllPfd1 Clock: 594000000
    SysPllPfd2 Clock: 396000000
    SysPllPfd3 Clock: 297000000
    EnetPll0 Clock: 0
    EnetPll1 Clock: 0
    AudioPll Clock: 786480000
    VideoPll Clock: 0
    Note its running a little faster than 150Mhz
    At 600Mhz
    Code:
    System Clock: 600000000
    IPG Clock: 150000000
    Semc Clock: 200000000
    RTC Clock: 32768
    USB1pll Clock: 480000000
    Peripheral Clock: 24000000
    Osc Clock: 24000000
    Arm Clock: 1200000000
    Usb1PllPfd0 Clock: 720000000
    Usb1PllPfd1 Clock: 664615368
    Usb1PllPfd2 Clock: 508235292
    Usb1PllPfd3 Clock: 454736826
    Usb2Pll Clock: 24000000
    SysPll Clock: 528000000
    SysPllPfd0 Clock: 351999990
    SysPllPfd1 Clock: 594000000
    SysPllPfd2 Clock: 396000000
    SysPllPfd3 Clock: 297000000
    EnetPll0 Clock: 0
    EnetPll1 Clock: 0
    AudioPll Clock: 786480000
    VideoPll Clock: 0

  12. #12
    Senior Member PaulStoffregen's Avatar
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    Quote Originally Posted by mjs513 View Post
    Way back when we first started I wrote an app that displayed all clocks (one of my first endeavors with the T4). I decided to dust it off and run it to see what it dumped out:
    Could you point me to that code, or post it here?

    I'm trying this and getting 24 MHz. I must be missing something...

    Code:
      Serial.println("clock test");
      uint32_t pll = CCM_ANALOG_PLL_ARM;  // page 1154
      int pll_mult = pll & 0x7F;
      Serial.printf("PLL = %d MHz\n", 12 * pll_mult);
      int arm_div = (CCM_CACRR & 7) + 1;  // page 1107
      int ahb_div = ((CCM_CBCDR >> 10) & 7) + 1; // page 1108
      Serial.printf("divs %u %u\n", arm_div, ahb_div);
      Serial.printf("frequency = %u\n", 12000000 * pll_mult / arm_div / ahb_div);

  13. #13
    Senior Member+ mjs513's Avatar
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    Probably easier if I just post it here. Its pretty just an extract of code taken from the 1060 SDK. So its a mess if you dig into it.
    Attached Files Attached Files

  14. #14
    Senior Member PaulStoffregen's Avatar
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    Looks like we're somehow not managing to switch back to the ARM PLL. Why, I have no idea (yet)....

  15. #15
    Senior Member+ defragster's Avatar
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    This is a secondary thread - missed my attention -

    Original issue 18 October - details and samples to repro there : forum.pjrc.com/threads/58053-T4-set_arm_clock-and-micros()

    Problem is clock feeding millis() that feeds micros() - quick look doesn't find when micros was added - long time back - but is it secondary.

    This post there is code to test against to see when fixed: threads/58053-T4-set_arm_clock-and-micros()?p=219174&viewfull=1#post219174

    Will integrate the prior code into mjs513 posted code sketch to show.

  16. #16
    Senior Member+ defragster's Avatar
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    Code:
    Using p#13 ClocksT4.zip
    Replace the ClocksT4.ino sketch with this. It does the changes as in the October Post - with clock data printed by @mjs513 and shows this when the counts are wrong on millis():
    " >>>>>>>>>>>>>>>>>>>> BUGBUG <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<< <<<<<<<<<<<<<<"

    Scanning the SerMon output will show clocks and for the ones as BUGBUG - you'll see another that has that shown WORKING.

    Code:
    /*
      Blink
      Turns on an LED on for one second, then off for one second, repeatedly.
    
      This example code is in the public domain.
     */
    
    #include "clock_functions.h"
    #include "Audio_pll.h"
    
    extern "C" uint32_t set_arm_clock(uint32_t frequency);
    static uint32_t t0;
    
    // Pin 13 has an LED connected on most Arduino boards.
    // Pin 11 has the LED on Teensy 2.0
    // Pin 6  has the LED on Teensy++ 2.0
    // Pin 13 has the LED on Teensy 3.0
    // give it a name:
    int led = 13;
    
    // the setup routine runs once when you press reset:
    void setup() {
      while ( !Serial && millis() < 4000 ) ;
    
      delay(2000);
      /*set osc clock crystal freq */
      CLOCK_SetXtalFreq(24000000UL);
    
      Serial.println();
      /* Set the core frequency into 62.5MHz. */
      //CLOCK_SetAHBDiv(0x07);
      //Serial.printf("System Clock 62.5: %d\r\n", CLOCK_GetAhbFreq());
    
      //delay(4000);
      /* Set the core frequency into 500MHz. */
      //CLOCK_SetAHBDiv(0x0);
      //Serial.printf("System Clock 500: %d\r\n", CLOCK_GetAhbFreq());
      //delay(4000);
      /* Set the core frequency into 600MHz. */
      //CLOCK_SetAHBDiv(0x1);
      //Serial.printf("System Clock 600: %d\r\n", CLOCK_GetAhbFreq());
    
      CCM_ANALOG_PLL_AUDIO = 0;
      //CCM_ANALOG_PLL_AUDIO |= CCM_ANALOG_PLL_AUDIO_BYPASS;
      CCM_ANALOG_PLL_AUDIO |= CCM_ANALOG_PLL_AUDIO_ENABLE;
      CCM_ANALOG_PLL_AUDIO |= CCM_ANALOG_PLL_AUDIO_POST_DIV_SELECT(2); // 0: 1/4; 1: 1/2; 0: 1/1
      CCM_ANALOG_PLL_AUDIO |= CCM_ANALOG_PLL_AUDIO_DIV_SELECT(32);
    
      CCM_ANALOG_PLL_AUDIO_NUM   = 0 & CCM_ANALOG_PLL_AUDIO_NUM_MASK;
      CCM_ANALOG_PLL_AUDIO_DENOM = 1 & CCM_ANALOG_PLL_AUDIO_DENOM_MASK;
    
    
      //--------------------------------------------------------
      /*
       * AUDIO PLL setting: Frequency = Fref * (DIV_SELECT + NUM / DENOM)
       *                              = 24 * (32 + 77/100)
       *                              = 786.48 MHz
       */
      const clock_audio_pll_config_t audioPllConfig = {
        .loopDivider = 32,  /* PLL loop divider. Valid range for DIV_SELECT divider value: 27~54. */
        .postDivider = 1,   /* Divider after the PLL, should only be 1, 2, 4, 8, 16. */
        .numerator = 77,    /* 30 bit numerator of fractional loop divider. */
        .denominator = 100, /* 30 bit denominator of fractional loop divider */
      };
    
    
      CLOCK_InitAudioPll(&audioPllConfig);
    
      CCM_ANALOG_MISC2 &= ~(CCM_ANALOG_MISC2_DIV_MSB | CCM_ANALOG_MISC2_DIV_LSB);
      CCM_CCGR5 |= CCM_CCGR5_SAI1(CCM_CCGR_ON);
      // clear SAI1_CLK register locations
      CCM_CSCMR1 &= ~(CCM_CSCMR1_SAI1_CLK_SEL_MASK);
      CCM_CS1CDR &= ~(CCM_CS1CDR_SAI1_CLK_PRED_MASK | CCM_CS1CDR_SAI1_CLK_PODF_MASK);
      //
      CCM_CSCMR1 |= CCM_CSCMR1_SAI1_CLK_SEL(2); // &0x03 // (0,1,2): PLL3PFD0, PLL5, PLL4,
      CCM_CS1CDR |= CCM_CS1CDR_SAI1_CLK_PRED(4 - 1); // &0x07
      CCM_CS1CDR |= CCM_CS1CDR_SAI1_CLK_PODF(8 - 1); // &0x3f
    
      CORE_PIN23_CONFIG = 3;  //1:MCLK
      IOMUXC_GPR_GPR1 &= ~(IOMUXC_GPR_GPR1_SAI1_MCLK1_SEL_MASK);
      IOMUXC_GPR_GPR1 |= (IOMUXC_GPR_GPR1_SAI1_MCLK_DIR | IOMUXC_GPR_GPR1_SAI1_MCLK1_SEL(0));
    
    
      printClocks();
    
      // initialize the digital pin as an output.
      pinMode(led, OUTPUT);
    
    #define MHZ_MHZ 1000000
      TimeDiff();
      set_arm_clock(240 * MHZ_MHZ); // comment here to get full speed
      TimeDiff();
      set_arm_clock(110 * MHZ_MHZ); // comment here to get full speed
      TimeDiff();
      set_arm_clock(600 * MHZ_MHZ); // comment here to get full speed
      TimeDiff();
      set_arm_clock(130 * MHZ_MHZ); // comment here to get full speed
      TimeDiff();
      set_arm_clock(110 * MHZ_MHZ); // comment here to get full speed
      TimeDiff();
      set_arm_clock(24 * MHZ_MHZ); // comment here to get full speed
      TimeDiff();
      set_arm_clock(600 * MHZ_MHZ); // comment here to get full speed
      TimeDiff();
      set_arm_clock(24 * MHZ_MHZ); // comment here to get full speed
      TimeDiff();
    
    }
    
    // the loop routine runs over and over again forever:
    void loop() {
      digitalWrite(led, HIGH);   // turn the LED on (HIGH is the voltage level)
      delay(1000);               // wait for a second
      digitalWrite(led, LOW);    // turn the LED off by making the voltage LOW
      delay(1000);               // wait for a second
    }
    
    void printClocks() {
      Serial.printf("System Clock: %d\r\n", CLOCK_GetAhbFreq());
      Serial.printf("IPG Clock: %d\r\n", CLOCK_GetFreq(kCLOCK_IpgClk));
      Serial.printf("Semc Clock: %d\r\n", CLOCK_GetFreq(kCLOCK_SemcClk));
      Serial.printf("RTC Clock: %d\r\n", CLOCK_GetFreq(kCLOCK_RtcClk));
      Serial.printf("USB1pll Clock: %d\r\n", CLOCK_GetFreq(kCLOCK_Usb1PllClk));
      Serial.printf("Peripheral Clock: %d\r\n", CLOCK_GetFreq(kCLOCK_PerClk));
      Serial.printf("Osc Clock: %d\r\n", CLOCK_GetFreq(kCLOCK_OscClk));
      Serial.printf("Arm Clock: %d\r\n", CLOCK_GetFreq(kCLOCK_ArmPllClk));
      Serial.printf("Usb1PllPfd0 Clock: %d\r\n", CLOCK_GetFreq(kCLOCK_Usb1PllPfd0Clk));
      Serial.printf("Usb1PllPfd1 Clock: %d\r\n", CLOCK_GetFreq(kCLOCK_Usb1PllPfd1Clk));
      Serial.printf("Usb1PllPfd2 Clock: %d\r\n", CLOCK_GetFreq(kCLOCK_Usb1PllPfd2Clk));
      Serial.printf("Usb1PllPfd3 Clock: %d\r\n", CLOCK_GetFreq(kCLOCK_Usb1PllPfd3Clk));
      Serial.printf("Usb2Pll Clock: %d\r\n", CLOCK_GetFreq(kCLOCK_Usb2PllClk));
      Serial.printf("SysPll Clock: %d\r\n", CLOCK_GetFreq(kCLOCK_SysPllClk));
      Serial.printf("SysPllPfd0 Clock: %d\r\n", CLOCK_GetFreq(kCLOCK_SysPllPfd0Clk));
      Serial.printf("SysPllPfd1 Clock: %d\r\n", CLOCK_GetFreq(kCLOCK_SysPllPfd1Clk));
      Serial.printf("SysPllPfd2 Clock: %d\r\n", CLOCK_GetFreq(kCLOCK_SysPllPfd2Clk));
      Serial.printf("SysPllPfd3 Clock: %d\r\n", CLOCK_GetFreq(kCLOCK_SysPllPfd3Clk));
      Serial.printf("EnetPll0 Clock: %d\r\n", CLOCK_GetFreq(kCLOCK_EnetPll0Clk));
      Serial.printf("EnetPll1 Clock: %d\r\n", CLOCK_GetFreq(kCLOCK_EnetPll1Clk));
      Serial.printf("AudioPll Clock: %d\r\n", CLOCK_GetFreq(kCLOCK_AudioPllClk));
      Serial.printf("VideoPll Clock: %d\r\n", CLOCK_GetFreq(kCLOCK_VideoPllClk));
    
    }
    
    void TimeDiff() {
      Serial.printf("\n F_CPU=%u", F_CPU_ACTUAL );
      t0 = millis(); // opps - this is needed here
      while (!(millis() > (t0 + 1000)));
      t0 = millis();
      uint32_t t1 = micros(), t2 = millis();
      delay(50);
      uint32_t foo = millis() - t2;
      Serial.printf("\t50ms delay:: %u us and %u ms\n", micros() - t1, foo);
      printClocks();
      if ( foo < 47 ) {
        Serial.printf("\n >>>>>>>>>>>>>>>>>>>>   BUGBUG   @%u MHz  <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<", F_CPU_ACTUAL/MHZ_MHZ );
        Serial.printf("\n F_CPU=%u\n", F_CPU_ACTUAL );
      }
    }
    Last edited by defragster; 12-16-2019 at 07:40 AM. Reason: fix to remove false positives

  17. #17
    Senior Member+ defragster's Avatar
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    Small Edit to code above.

    NOTE: As noted elsewhere Compile at 24 MHz and it starts broken as well.

    Code change above gives proper and clearer output:
    Code:
      if ( foo < 47 ) {
        Serial.printf("\n >>>>>>>>>>>>>>>>>>>>   BUGBUG   @%u MHz  <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<", F_CPU_ACTUAL/MHZ_MHZ );
        Serial.printf("\n F_CPU=%u\n", F_CPU_ACTUAL );
      }
    It should show at:
    >>>>>>>>>>>>>>>>>>>> BUGBUG @24 MHz <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<< <<<<<<<<<<<<<<
    F_CPU=24000000
    and
    >>>>>>>>>>>>>>>>>>>> BUGBUG @110 MHz <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<< <<<<<<<<<<<<<<
    F_CPU=110000000

  18. #18
    Senior Member+ defragster's Avatar
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    Parsing the output shows this:

    BUGBUG @110:
    Code:
     F_CPU=110000000	50ms delay:: 1010 us and 1 ms
    System Clock: 120000000
    IPG Clock: 120000000
    Semc Clock: 40000000
    RTC Clock: 32768
    USB1pll Clock: 480000000
    Peripheral Clock: 24000000
    Osc Clock: 24000000
    Arm Clock: 660000000
    Usb1PllPfd0 Clock: 720000000
    Usb1PllPfd1 Clock: 664615368
    Usb1PllPfd2 Clock: 508235292
    Usb1PllPfd3 Clock: 454736826
    Usb2Pll Clock: 24000000
    SysPll Clock: 528000000
    SysPllPfd0 Clock: 351999990
    SysPllPfd1 Clock: 594000000
    SysPllPfd2 Clock: 396000000
    SysPllPfd3 Clock: 297000000
    EnetPll0 Clock: 0
    EnetPll1 Clock: 0
    AudioPll Clock: 786480000
    VideoPll Clock: 0
    
     >>>>>>>>>>>>>>>>>>>>   BUGBUG   @110 MHz  <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<
     F_CPU=110000000
    Versus working at 110 MHz:
    F_CPU=110000000 50ms delay:: 50001 us and 50 ms
    System Clock: 110000000
    IPG Clock: 110000000
    Semc Clock: 36666666
    RTC Clock: 32768
    USB1pll Clock: 480000000
    Peripheral Clock: 24000000
    Osc Clock: 24000000
    Arm Clock: 660000000
    Usb1PllPfd0 Clock: 720000000
    Usb1PllPfd1 Clock: 664615368
    Usb1PllPfd2 Clock: 508235292
    Usb1PllPfd3 Clock: 454736826
    Usb2Pll Clock: 24000000
    SysPll Clock: 528000000
    SysPllPfd0 Clock: 351999990
    SysPllPfd1 Clock: 594000000
    SysPllPfd2 Clock: 396000000
    SysPllPfd3 Clock: 297000000
    EnetPll0 Clock: 0
    EnetPll1 Clock: 0
    AudioPll Clock: 786480000
    VideoPll Clock: 0

    And Startup with 24 MHz compile BUGBUG:
    System Clock: 30000000
    IPG Clock: 30000000
    Semc Clock: 40000000
    RTC Clock: 32768
    USB1pll Clock: 480000000
    System Clock: 30000000
    000
    EnetPll0 Clock: 0
    EnetPlOsc Clock: 24000000
    Arm Clock: 672000000
    Usb1PllPfd0 Clock: 720000000
    Usb1PllPfd1 Clock: 664615368
    Usb1PllPfd2 Clock: 508235292
    Usb1PllPfd3 Clock: 454736826
    Usb1PllPfd0 Clock: 720000000
    k: 32768
    Clock: 24000000SysPll Clock: 528000000
    SysPllPfd0 Clock: 351999990
    SysPllPfd1 Clock: 594000000
    SysPllPfd2 Clock: 396000000
    SysPllPfd3 Clock: 297000000
    EnetPll0 Clock: 0
    EnetPll1 Clock: 0
    AudioPll Clock: 786480000
    VideoPll Clock: 0

    F_CPU=24000000 50ms delay:: 1050 us and 1 ms
    System Clock: 30000000
    IPG Clock: 30000000
    Semc Clock: 40000000
    RTC Clock: 32768
    USB1pll Clock: 480000000
    System Clock: 30000000
    000

    k: 32768
    Clock: 2400000Osc Clock: 24000000
    Arm Clock: 672000000
    Usb1PllPfd0 Clock: 720000000
    Usb1PllPfd1 Clock: 664615368
    Usb1PllPfd2 Clock: 508235292
    Usb1PllPfd3 Clock: 454736826
    Usb1PllPfd0 Clock: 720000000
    k: 32768
    k: 0

    F_CPU=2SysPll Clock: 528000000
    SysPllPfd0 Clock: 351999990
    SysPllPfd1 Clock: 594000000
    SysPllPfd2 Clock: 396000000
    SysPllPfd3 Clock: 297000000
    EnetPll0 Clock: 0
    EnetPll1 Clock: 0
    AudioPll Clock: 786480000
    VideoPll Clock: 0

    >>>>>>>>>>>>>>>>>>>> BUGBUG @24 MHz <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<< <<<<<<<<<<<<<<
    F_CPU=24000000
    And 24 MHz Working:
    F_CPU=24000000 50ms delay:: 50006 us and 50 ms
    System Clock: 24000000
    IPG Clock: 24000000
    Semc Clock: 32000000
    RTC Clock: 32768
    USB1pll Clock: 480000000
    Peripheral Clock: 24000000
    Osc Clock: 24000000
    Arm Clock: 672000000
    Usb1PllPfd0 Clock: 720000000
    Usb1PllPfd1 Clock: 664615368
    Usb1PllPfd2 Clock: 508235292
    Usb1PllPfd3 Clock: 454736826
    Usb2Pll Clock: 24000000
    SysPll Clock: 528000000
    SysPllPfd0 Clock: 351999990
    SysPllPfd1 Clock: 594000000
    SysPllPfd2 Clock: 396000000
    SysPllPfd3 Clock: 297000000
    EnetPll0 Clock: 0
    EnetPll1 Clock: 0
    AudioPll Clock: 786480000
    VideoPll Clock: 0

  19. #19
    Senior Member PaulStoffregen's Avatar
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    I'm committed a fix on github.

    https://github.com/PaulStoffregen/co...c6874ecd59ce2e

    Why simply writing the correct value to CCM_CBCDR doesn't work at 24 MHz, but the read-modify-write does is a complete mystery to me. Maybe it has something to do with triggering the glitchless mux properly?

    Another interesting side effect is auto-upload no longer seems to work. But it was working when we were actually running at 30 MHz. According to NXP the USB isn't supposed to work unless the chip runs at 100 MHz or higher, so it's pretty surprising Serial.print() is working at all.

    Later (probably much later) I'll look into this auto-upload issue.

    The set clock function should probably also do things differently to achieve lower power, like turning off the ARM PLL and using the crystal directly. But that too is work for another day....

  20. #20
    Senior Member+ mjs513's Avatar
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    Quote Originally Posted by PaulStoffregen View Post
    I'm committed a fix on github.

    https://github.com/PaulStoffregen/co...c6874ecd59ce2e

    Why simply writing the correct value to CCM_CBCDR doesn't work at 24 MHz, but the read-modify-write does is a complete mystery to me. Maybe it has something to do with triggering the glitchless mux properly?

    Another interesting side effect is auto-upload no longer seems to work. But it was working when we were actually running at 30 MHz. According to NXP the USB isn't supposed to work unless the chip runs at 100 MHz or higher, so it's pretty surprising Serial.print() is working at all.

    Later (probably much later) I'll look into this auto-upload issue.

    The set clock function should probably also do things differently to achieve lower power, like turning off the ARM PLL and using the crystal directly. But that too is work for another day....
    @defragster - @PaulStoffregen
    Incorporated the fix and re-ran the ClocksT4 sketch, now getting
    Code:
    System Clock: 24000000
    IPG Clock: 24000000
    Semc Clock: 32000000
    RTC Clock: 32768
    USB1pll Clock: 480000000
    Peripheral Clock: 24000000
    Osc Clock: 24000000
    Arm Clock: 672000000
    Usb1PllPfd0 Clock: 720000000
    Usb1PllPfd1 Clock: 664615368
    Usb1PllPfd2 Clock: 508235292
    Usb1PllPfd3 Clock: 454736826
    Usb2Pll Clock: 24000000
    SysPll Clock: 528000000
    SysPllPfd0 Clock: 351999990
    SysPllPfd1 Clock: 594000000
    SysPllPfd2 Clock: 396000000
    SysPllPfd3 Clock: 297000000
    EnetPll0 Clock: 0
    EnetPll1 Clock: 0
    AudioPll Clock: 786480000
    VideoPll Clock: 0
    and no more time running backwards!

    If you do decide to go to low power at 24Mhz maybe have it set up for 24Mhz and another for 24Mhz(low power).

  21. #21
    Senior Member+ defragster's Avatar
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    Rushing out the door - back in a few hours to see ...

  22. #22
    Senior Member+ manitou's Avatar
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    Quote Originally Posted by PaulStoffregen View Post
    CoreMark (-O3, @24mhz) was 123.53 iterations/sec, with 24mhz fix in clockspeed.c drops to 98.77

    Correction: I reran the CoreMark with meter to measure milliamps. with 1.48, 98.77 iterations/sec and 34.44 ma. With 1-49-beta3, i get 98.75 iterations/sec and 33.96 ma
    Last edited by manitou; 12-17-2019 at 05:28 PM.

  23. #23
    Senior Member PaulStoffregen's Avatar
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    @chrissteffen, @HallMark - Please give 1.49-beta3 a try and let me know if it fully solves the problem you've experienced?

  24. #24
    If i updated it correctly then it didnt help much. Currently Im unable to test the delay properly, in the short test i did with the example sketch from the library it didint give me any errors but i also didnt give me any values (it delays 980ms then gives all the values from the FIFO) so either the delay took too long or the communication with the MPU9250 had an error.
    Im still getting errors when running above a certain cpu speed but this time above 450mhz. The begin() function is giving -2 as an error code. I looked into the Library and it seems like the first attempt to write to a register is successful but the second write fails.
    When i have time to properly test it, i will post an update.

  25. #25
    Senior Member+ mjs513's Avatar
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    Quote Originally Posted by chrissteffen
    If i updated it correctly then it didnt help much. Currently Im unable to test the delay properly, in the short test i did with the example sketch from the library it didint give me any errors but i also didnt give me any values (it delays 980ms then gives all the values from the FIFO) so either the delay took too long or the communication with the MPU9250 had an error.
    As a sanity check I hooked up a MPU-9250 using I2C since you said you were having the same problems with using I2C. I ran the FIFO example and yes it delays 980ms after it initializers and configures the MPU and then prints 50 samples. I looks like the data is correct, az is showing -10.0x m/s which is about 1g pointing down:
    Code:
    The FIFO buffer is 50 samples long.
    0.292107	0.316051	-10.027428
    0.277742	0.316051	-10.041794
    0.268164	0.325628	-10.065737
    0.277742	0.339994	-10.032216
    0.287319	0.325628	-10.060948
    0.268164	0.335205	-10.060948
    0.272953	0.325628	-10.017850
    …….
    I repeated this test at 24Mhz and 600Mhz clock speed. Nothing else is printed because all this happens in "setup" not in the "loop" so you are only going to get a dump of 50 then the sketch is finished. So it looks like its doing what it is meant to do. Also, the I2C option appears to be working at 24 and 600 as well - I tested the basic and advanced examples.

    Haven't tried SPI yet though.

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