The reference manual for the processor is not helpful...because the missing piece of information is which Teensy pins (which I2S lines) are used by the I2S_quad class. That's the part I can't figure out. That's a question that is entirely within the Teensy universe.
It is *so* awesome that someone (Paul?) Did all the hard and thankless labor to get it to work! Bit which I2S pins did they end up using?
Thanks!
Chip
Fig 37.2 in the processor manual shows that the way I2S data inputs and outputs are multiplexed in SAI1
is:
Code:
function T4 name T4 pin no
RX0 IN1 8
TX3 / RX1 OUT1D 6
TX2 / RX2 OUT1C 9
TX1 / RX3 OUT1B 32
TX0 OUT1A 7
[ other alternate actual pins can be assigned to these functions, but most of the others aren't pinned out in
the T4, so these are basically fixed allocations ]
The SAI1 unit can be configured to read from consecutive inputs only, thus for two
input pins (= 2 x stereo = quad), the choices are 8/6, 6/9, 9/32.
The Teensy names for the pins only reflects the output function except for IN1
This matches the code in the audio library.
You should be able to guess that the corresponding pins possibilities for quad output
are 7/32, 32/9 and 9/6, which indeed they are.
[ reading chapters 37--40 three times in a row will answer most questions about the details of audio
units, the first pass as a skim-read to familiarize, the second to assimilate the main functions and the third to
reinforce - that's how I get familiar with a complex datasheet in practice I find ]