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Thread: Teensy 4.0 vs PORTENTA H7

  1. #26
    Senior Member+ KurtE's Avatar
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    Wonder if some of this conversation should be back in the thread: https://forum.pjrc.com/threads/57842...res-amp-pinout

    And who needs more than 640K?

    As mentioned it may be exciting to program to use both processors. As mentioned earlier, FPU is probably different, but I can imagine lots of areas that may be different.
    Example: M4 supports bit-band access M7 does not... It will be interesting to see the differences in registers for different things like SPI or GPIO

  2. #27
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    Luni, did you ever read the german forum mikrocontroller.net?
    Oh my..., pretty much every thread there ends in a big bashing of somebody / something :-) Nowadays, I can only read it when I need to get rid of too much good mood :-) The only useful information I ever got out of it was this https://forum.pjrc.com/threads/38736...l=1#post142462 nice encoder algorithm which I still prefer over interrupt driven ones.

  3. #28
    Senior Member+ Frank B's Avatar
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    @Kurt:Very much fun, esp if they share the same periphals (over a bus?)
    I'm not that sure that that thing is made for Arduino or "bare metal".. If we don't want a RTOS, I fear we have to restrict some things, otherwise it will become unusable due to incompatible libs. More an more over the time..
    @Luni: yes... I remember some good algorithms from Peter Dannegger.

  4. #29
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    Quote Originally Posted by luni View Post
    Oh, somehow that reminds me of
    Maybe I should have specified that the comment came with an expiration date. I would never think use cases won't develop as people get more sophisticated hardware to read/control. But with most of the MCU's being an M0, or M4, or less, i think it will take time for the industry to catch up to the new hardware capabilities. That is, unless these MCU's really do become a hybrid device and with 64 MB of RAM and 128 MB of NAND flash on the board, it really could be that. I'm far more excited to see what the added RAM does for the MCU's than the actual MHZ of the core.

  5. #30
    Senior Member+ Frank B's Avatar
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    In any case, we should think it all over carefully and try to go the right way from the beginning. You will never get rid of a mistake in the beginning.

  6. #31
    Senior Member PaulStoffregen's Avatar
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    Quote Originally Posted by KurtE View Post
    It will be interesting to see the differences in registers for different things like SPI or GPIO
    Nearly all the peripherals are on a common bus that both M7 and M4 can access.

  7. #32
    Senior Member+ MichaelMeissner's Avatar
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    Quote Originally Posted by PaulStoffregen View Post
    Nearly all the peripherals are on a common bus that both M7 and M4 can access.
    That makes sense (likely all of the external access stuff is in one area of the chip), though of course it opens up the issue if both the M7 and M4 want to try and access the same port at the same time.

  8. #33
    Senior Member+ Frank B's Avatar
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    Yup, you'll end up using ldrex/strex around every access.
    Or, more simple, restrict this and use only one core for this.

    Edit: Maybe the MPU can be useful?
    Last edited by Frank B; 02-05-2020 at 07:21 AM.

  9. #34
    Senior Member+ Frank B's Avatar
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    Perhaps one could also consider - even if this sounds unusual now and certainly doesn't have many advocates - to simply ignore the M4 and to switch it off. Things would be way better to handle.

  10. #35
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    Quote Originally Posted by Frank B View Post
    Perhaps one could also consider - even if this sounds unusual now and certainly doesn't have many advocates - to simply ignore the M4 and to switch it off. Things would be way better to handle.
    As long as it is NOT done in HW but only in SW.
    I really look forward to a Dual processor architecture and I have a need for it and it does not need to be symmetric.

  11. #36
    Senior Member+ Frank B's Avatar
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    Yes I would find two cores exciting, too. But if I have the choice between a solution that can be used immediately and a solution that may take months and i don't know what pitfalls it has, I prefer the first version. And I assume that the M4 can be switched off in SW- or, easiest, you just don't use it at all.

    This is just a discussion - what Paul will choose then we will see
    Edit:
    And it is too early to decide anything.

  12. #37
    Senior Member+ Frank B's Avatar
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    Maybe it has a simple hardware-solution - a setting that enables I.e.SPI or timer for one selectable core only - all problems gone.. and no need to ldrex/strex
    Ok, that's the same as just not using it by both CPUs..

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    Quote Originally Posted by maladil View Post
    I just ran across the Portenta H7 today. I think what jumped out at me the most is the 64 MB of SDRAM, and 128 MB of NAND Flash, in addition to an SD card reader via expansion. Is that much RAM essentially to run a WRT type OS? I don't know how much RAM is needed to run the not so "micro" version of Python, but I have to think that 64 MB is approaching that point.
    Linux can be run on Portenta H7 but it's more an exercise than something useful. The lack of a MMU will prevent some of the benefits of Linux and at the same time speed is not what you'd expect nowadays.
    Quote Originally Posted by maladil View Post
    As for dual cores, the ESP32 seemed to show the real value in dedicating a core to WIFI/IO to free the other core to run the logic. Keeping it simple with dedicated tasks to the cores would be my first inclination. I'll leave squeezing every drop of performance out of the package to others while i amaze myself at making lights blink on or off.
    That's more or less what we're aiming at. Likely there will be "libraries" of real time software running on m4 that can be commanded by high level code on M7 or vice versa, Arduino code running on M4 managing high level software such as tensorflow running on M7. Either way you'll be able to approach your problem the way you like taking advantage of ready made libraries

  14. #39
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    I took a look at Portenta and I liked it, but what I am extremely worried is the reliability of the small connectors... how robust are they? They advertize it for industrial environment, but how safe are these connectors? The pitch seems very fine...

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    These connectors are 0.4mm pitch. What do you mean by robustness? The number of guaranteed insertions is limited to 30 but that's to keep the very low ohmic contact declared. Before choosing this part we had the manufacturer give us a statement on durability after those 30 insertions and the result is that contact resistance increases a bit but it's still really negligible.
    In terms of retention the connection is very stiff and requires quite some force to insert and extract.
    For vibration and shock the spec is available and is definitely ok for industrial applications but of course you have to compare it with the requirements your specific use case may have

  16. #41
    Senior Member+ Frank B's Avatar
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    Quote Originally Posted by pnndra View Post
    The number of guaranteed insertions is limited to 30
    Oops. For industry ok, for sure.
    Before I'm accused of being biased again, I'll leave it at that ;-)

  17. #42
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    Quote Originally Posted by Frank B View Post
    Oops. For industry ok, for sure.
    Before I'm accused of being biased again, I'll leave it at that ;-)
    Well Frank let me understand... In an industrial application how many times do you think a CPU module will be inserted in the carrier board? Likely not more than once in the product lifetime. For example do you know for how many insertions the LGA sockets for intel CPUs are rated? Just 15 but this does not prevent them to be used even in military applications...
    You see... Maybe I would have accepted the objection that 30 insertions are low for the maker market and I already outlined we had the manufacturer give us quality figures for hundreds of insertions but really... Unless you want to use Portenta to test carrier boards in a production line (for which high insertion count connectors are available anyway) industrial usage won't require more than a few insertions...

    It's not about being accused of being biased, rather probably to bring useful arguments to the table.

  18. #43
    Senior Member+ Frank B's Avatar
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    A hobbyist aka "Maker" aka average Arduino user will exceed the 30 insertions within 2 days.
    After 2 weeks it will be broken.

    Yes, for industry, 1 insertion is enough.

  19. #44
    Senior Member+ MichaelMeissner's Avatar
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    Quote Originally Posted by Frank B View Post
    A hobbyist aka "Maker" aka average Arduino user will exceed the 30 insertions within 2 days.
    After 2 weeks it will be broken.

    Yes, for industry, 1 insertion is enough.
    Well 1 insertion after the board is debugged. I have to imagine during bring-up there might be multiple insertions.

  20. #45
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    Ok so in your previous post I had the sensation you were sarcastic on the industrial usage. I may have misunderstood your tone but sure enough seems to me you're flipping around. Anyway Portenta is openly declared a professional product (have you visited arduino.cc/pro?) whose cost is high also due to the industrial temperature and the expected longevity of the components.
    We're not marketing it for makers but of course welcome those who want to use it and this is the reason why we asked the supplier to qualify it for hundreds of insertions (read above).
    Remember that these are not pin headers where you insert jumper wires at random... Likely you will fit the board onto an application board and keep it there for the duration of a project. Even if you're debugging it's going to be a few tens, maybe a hundred and we had it measured for several hundreds.
    If you think that as a maker you want to spend your days challenging the durability of these connectors be my guest... I'm pretty sure (backed by manufacturer's data) who wants to do something useful with this class of boards will be doing something else and won't have issues even if they move it hundreds of times across different application boards.

  21. #46
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    Well, I can not understand well what this connector is. Is it for ribbon cable? Now, if you have the main board with 0.4 pitch, then on the expansion boards you also would expect to have the same pitch, but that is really impossible to protype manually, you probably need a breakout board.

    What exactly this connector is called?

    Are there any solutions which allow to pass from this connector to much bigger pitch?

  22. #47
    Senior Member PaulStoffregen's Avatar
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    Since NXP has not yet published a 1170 reference manual (at least not without NDA), I'm intentionally waiting to comment on many of the technical points. I have only quickly looked at ST's documentation for the H7 chip, but I'm assuming it's similar to what NXP will do.


    Quote Originally Posted by Frank B View Post
    Yup, you'll end up using ldrex/strex around every access.
    From ARM's documentation, you can see these instructions only apply to normal memory. They do not work with "strongly ordered memory", so they're not effective for use with peripherals.

    Whether NXP actually implements this correctly between the 2 cores remains to be seen. I recall seeing info (errata) on other non-NXP chips that basically said these instructions did not work properly between the CPU cores. I really do hope they get this right, but I would not be surprised if each CPU core ends up having its own separate lock mechanism, making this worthless for its intended purpose between the cores.


    Or, more simple, restrict this and use only one core for this.
    Seems unlikely for both cores to share a peripheral. But I do believe having one core use some peripherals and the other core use the rest should work, so you could (probably) have the M7 use Serial1, Serial4, Serial5 and have the M4 use Serial2, Serial3, Serial6. Of course, that depends on both configuring the clock tree the same way, but that issue exists today on Teensy 4.0 (eg, all the serial ports run from "uart_clk_root") with only a single CPU core.


    Edit: Maybe the MPU can be useful?
    The MPU is not shared. Each CPU core has its own MPU. Here's the block diagram from NXP's public "fact sheet".

    Click image for larger version. 

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    Whether the MPU in each core is the same is also a good question. There's a good chance M4's MPU may support fewer regions than M7's.

    In NXP's iMX application multi-core processors (which have public documentation), they have included special peripherals meant for synchronizing and messaging between each CPU core. What exactly we will get with 1170, I can not say, but I don't believe it takes too much imagination or reveals any secrets to suggest NXP will very likely make this new chip by reusing the peripheral IP they've put in their other iMX products. If you *really* want to think about these low level details, looking at the documentation for those chips might give you some ideas.


    what Paul will choose then we will see
    So far, I really haven't done much on this. I've been focusing on the 1062 chip for Teensy 4.1. Configuring ethernet clock has been a 2-week nightmare. I only got working just a couple days ago. Then the ping packet test program that worked on Teensy 3.6 sprang to life. Getting Teensy 4.1 into production (or fully ready before all the parts arrive) is my top priority right now. I'm planning to look at 1170 only after Teensy 4.1 is done.

    I am going to collaborate with Arduino on this. We've already exchanged a few emails. I do believe everyone benefits if we create compatible APIs.


    Quote Originally Posted by pnndra View Post
    Anyway Portenta is openly declared a professional product (have you visited arduino.cc/pro?) whose cost is high also due to the industrial temperature and the expected longevity of the components.
    I do believe there's a strong need for this. It's definitely not where Teensy is focused, very much on commercial temperature range, keeping costs low (no big SDRAM chip), and focusing on makers.

  23. #48
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    Quote Originally Posted by chileflora View Post
    Well, I can not understand well what this connector is. Is it for ribbon cable? ...
    It's hirose df40 and it's for board to board connection. We chose jt, Amin other things because it's small and it allows variable stacking height, mostly to allow very compact systems.
    Likely you won't be able to break out connections manually and it's not intended for this. We're designing a number of carrier/application boards to ease access to the board functions.

    Quote Originally Posted by PaulStoffregen View Post
    I have only quickly looked at ST's documentation for the H7 chip
    The interoperation between processors can be handled on STM32H747 by using the hardware semaphores. There is a number of such semaphores which can be set/cleared only by a given, programmable, ahb master. This solution is pretty effective if you use it and allowed the porting of openAMP, which provides a nice infrastructure for mailboxes.
    Bottom line is you won't access peripheral registers directly but rather assign them to a core that will coordinate accesses through command queues.
    This is a much cleaner approach than sharing registers as the latter would need precise synchronization of what each core is doing with the peripheral.

  24. #49
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    Quote Originally Posted by pnndra View Post
    It's hirose df40 and it's for board to board connection. We chose jt, Amin other things because it's small and it allows variable stacking height, mostly to allow very compact systems.
    Likely you won't be able to break out connections manually and it's not intended for this. We're designing a number of carrier/application boards to ease access to the board functions.

    .
    This is exactly one of the problems I thought there will be with this type of connector for my applications - I ddi succesfully developped boards which had Atmel boards soldered on them as a unit, notably Nano, and Robotdyn Mega pro. I defintriively do not need any ready-made break-out boards. Now, installing this same connector on DIY breakoutboard looks really hard. I would prefer to have at most 1.2 mm pitch, better the stadard 2.56 mm, becaue this allows manuall prototyping. I think this is very very weak spot of Portenta. What I liked so much about teensy (3.5) is the number of widely spaced pins; if Portenta was similar, that would have been great.

    Now if you had a standard break-out board just with pins for each connector that would be great. In the end, for my application I was thinking of installing two Teensy or even two Mega pro boards which take quite some space, so one Portenta with a one or two break-out boards wouild be that much bigger...

    Or the other option would have to get (=manufacture) special cable with connector for your board on the one side and a different, wider connector on the other (for instance, two rows of 2.56 mm pitch). I am not sure if it would be possible technically though to make one...
    Last edited by chileflora; 02-07-2020 at 12:10 PM.

  25. #50
    Senior Member PaulStoffregen's Avatar
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    Portenta H7 does have 2.54mm spaced pins on the outside edge. But only so many can fit, because they are so large.

    Teensy is the same way. We try to put as many of those pins on the outside edge as possible, but it is never enough for everyone. To get more signals without smaller pitch, the PCB would need to become very long.

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