T4 Low Power or sleep modes - again, sort of...

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Pablo2000

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Hi folks

Many thanks for the wealth of information available on this forum - but, been searching and haven't found a satisfactory resolution to this problem.

I'll apologise now for the length and amount of information. but I've always found it best to include as much as possible. There's a "tl;dr" further down if you prefer :)

Background: I am currently working on product design for a relatively simple bus interface unit to a slow host device. Normally I would use PLD/FPGA devices but opted for the T4 as it opens up solutions to a number of design requirements in one package. The bus interface is handled by an interrupt driven state machine - this all works extremely well and is very robust. There is a minimal user interface - 3 buttons and a small OLED display. The host device is battery powered (the T4 draws its power from the host bus and so places additional load on the supply battery) and as part of it's power management strategy enters a 'sleep' mode during idle periods - clealry I'd like the T4 to do something similar. I need to be able to place the T4 either in a true sleep state, or engage a _very_ low clock speed to minimise consumption - ideally the sleep state, but as the device ram is volatile, this must not be affected by the suspended state.

Problem(s): The 'snooze' library doesnt yet fully support the T4 and Mr Duffy doesnt know when he will be able to work on this (I read this in another thread). The set_arm_clock() mechanism takes too long for the new clock speed to 'kick-in' as it has to make voltage and PLL changes which take time to settle. I have a maximum of 4uS for the 'wakeup' sequence, to avoid missing edges on the host bus. The core "sleep.h" file contains a stub for the 'wfi' instruction, this requires setting the sleep mode in the iMXRT CCM_LPM register which is thwarted by this in the same file: "#define set_sleep_mode(mode) // TODO: actually set the mode..." and I can't seem to locate a pointer to the register in imxrt.h

tl;dr - I need to sleep the T4 in a way that it can wake up fast and which maintains ram contents throughout.

Any guidance as to how best to move forward, given the above? I would be super if there was also a way to battery back the RAM - at the moment I'm designing in an external NVRAM, but as I need to store up to 90K the parts become quite expensive in relation to the manufacturing cost - almost as much as the T4 itself. Whilst not high volume by any stretch of the imagination (maybe 1000 units over an 18 month period) - as always cost is king! I really really really want to stay with the T4 - I think it's a great processor on a well designed and robust little board, but I need a way to manage power. Changing now would mean not only the PLD design but also inclusion of new peripherals (which are 'just there' on the T4), new PCB layouts - a toal project restart.


Thanks for any and all suggestions or advice.

Pablo
 
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Looks like any of the low power modes need to scale the PLL so that will limit your power mode you can go into according to your requirements. According to the documents Frank shared that would be "Low Power Idle" or "System Idle". I can say that it is not easy to put these guys into any of the sleep modes like the M4's and in either of those two modes you have to manually shut off a lot of stuff to get it to somewhat work. I haven't looked at the latest core yet but there where some issues in using the "set_arm_clock()" to lower the cpu speed for those two modes. Also I don't think Paul has the boot loader chip going into sleep yet either.
 
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