Jadetortoise
New member
Hi, I'm embarking on an ultrasound project in which I was hoping to use the FlexIO module to implement a custom SPI interface to feed waveform data to one of an array of external circular shift registers. Basically I need to send 192 bits of data on a custom clock frequency generated by an eFlexPWM(7.68MHz). The datasheet says there are 3 banks of FlexIOs, FlexIO1, FlexIO2, and FlexIO3, where FlexIO1 has 16 pins and FlexIO2-3 have 32pins. The datasheet then goes on to describe a single module as a shift register which can be tied to others to form a larger shift register. However, it seems like there are only 12 32bit shift registers total, each in banks of 4. I need 6 32 -bitregisters tied together for 192 bits, is this possible?
The clock cycles for the shifting are also used for driving the ultrasound signal, so once the signal to send is set, the I need 1 bit going out on every clock pulse.
Big picture-wise, the Teensy will send updated waveform data one at a time to each circular shift register, which in turn drive an array of ultrasonic transducers, with the goal of being able to drive anywhere from 8 to 1024 transducers in a phased array. Since the clock signals are hardware generated and the Teensy is only used to update waveforms rather than drive them all, the processor should be free to do others stuff.
The clock cycles for the shifting are also used for driving the ultrasound signal, so once the signal to send is set, the I need 1 bit going out on every clock pulse.
Big picture-wise, the Teensy will send updated waveform data one at a time to each circular shift register, which in turn drive an array of ultrasonic transducers, with the goal of being able to drive anywhere from 8 to 1024 transducers in a phased array. Since the clock signals are hardware generated and the Teensy is only used to update waveforms rather than drive them all, the processor should be free to do others stuff.