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Thread: How to setup externally triggered DMA transfer from ADC to RAM (T3.5/T4)

  1. #1
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    How to setup externally triggered DMA transfer from ADC to RAM (T3.5/T4)

    I am looking for a solution to do faster data acquisition than with my current ATXmega256A3BU setup (32MHz).
    With the Xmega and using Bascom IDE that is quite a simple task.
    But with the Teensys I did not find a solution.

    It's kind of boxcar integrator with the purpose of averaging the ADC-readings over a couple of externally triggered time-sweeps from a periodic master signal that is fed to the CPU's comparator input.
    Signal-input (extremely noisy) is to an ADC, the master signal (500Hz sinus) is fed to the internal comparator and upon each trigger event the DMA transfers the ADC readings to RAM.
    Then the RAM is copied to an array and upon the next trigger the new results are added to the array. This in effect acts a a low-pass filter.
    After about 64 of those triggered cycles the contents of the array is evaluated (and displayed on a TFT display).

    To start with I tried codes like from this thread (#20 or #17) but they are not giving any output to the serial monitor.
    https://forum.pjrc.com/threads/30171...el-Acquisition

    On the trigger issue I did not find promising suggestions so far.

    Could somebody kindly suggest how to achieve that (i.e. external triggered ADC_DMA transfer) with a Teensy (have 3.5 and 4 at present)?
    Thanks.

  2. #2
    Senior Member+ KurtE's Avatar
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    You might take a look at the ADC Library? There is a thread that describes a lot about it: https://forum.pjrc.com/threads/25532...y-4-3-x-and-LC

  3. #3
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    Thanks, KurtE
    I had seen that thread but it does not seem to address the question on how to set up DMA-transfer (ADC-->RAM) being triggered externally.
    In my working solution with the ATXMega I have the ADC running free and I start DMA transfer upon a trigger from the internal comparator (could also have used a digital pin as trigger source).
    Is there any comprehensive documentation on the Teensy-CPU (register settings)?

  4. #4
    Senior Member+ KurtE's Avatar
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    Sorry I am not an expert in a lot of the Analog stuff. Did help out some to get it working on T4...

    Data sheets for all of the processors can be downloaded from: https://www.pjrc.com/teensy/datasheets.html

    During that time, I did play around with some of the DMA stuff. At that time I did have an example that when you triggered it, it would do the analog reads as fast as possible (probably depending on your ADC settings) and when would trigger an interrupt when it filled your buffer. I also had version that would use chain two buffers and go continuous and interrupt you as each buffer filled....

    Also there are ways to set it up to use a timer to control the speed of the ADC conversions...

    As for triggers, the only parts I experimented with were the timers, and on T4, a few us played with chaining multiple ADC pins using the ADC_ETC system along with XBAR.... My guess is that you might find some setup using the XBAR and ADC_ETC that maps some other subsystem to be trigger.

    Likewise if you are setup with some external IO pin to trigger it, you can probably just trigger the DMA operation on the ISR for that pin...

    Sorry again I am not at all in expert on the ADC stuff. Maybe someone else may have some ideas.

  5. #5
    I am also interested in operating the ADC as fast as possible and then transferring about 20 to 30 readings to RAM so I will be watching this thread. Right now someone has posted that they think the fastest way to do this is by the readContinuous command that is in the Teensy 4.0 ADC examples. I have yet to prove this but if you find this to be true, please post. Thanks.

  6. #6
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    You can use a port input pin. For T3.5, you can find the DMA MUX request sources in Section 3.3.9.1 of the MK64FX512 Manual

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