Hi all,
I'm trying to get my designs to be ESD proof so that I can pass EMC immunity testing. The board is a 2-layer design with a ground plane on the bottom and it's installed in a plastic enclosure. I'm using TVSs, diode protected inputs, and I've set unused pins to OUTPUT LOW, but I'm still seeing my devices 'freeze' when an ESD event floods the ground plane (about 1 in every 20 events)
Without recessing my input connectors (preventing ESD from ever reaching the ground plane), are there any strategies for keeping a device stable when a ESD event discharges to the ground plane? The only thing I can think of is that I might need better bypassing / decoupling. Right now I'm using a single 0603 0.1uF cap on each power pin. Is that enough? Does the package size make a difference? Would having multiple caps in parallel help? I'd love to hear any advise.
I'm trying to get my designs to be ESD proof so that I can pass EMC immunity testing. The board is a 2-layer design with a ground plane on the bottom and it's installed in a plastic enclosure. I'm using TVSs, diode protected inputs, and I've set unused pins to OUTPUT LOW, but I'm still seeing my devices 'freeze' when an ESD event floods the ground plane (about 1 in every 20 events)
Without recessing my input connectors (preventing ESD from ever reaching the ground plane), are there any strategies for keeping a device stable when a ESD event discharges to the ground plane? The only thing I can think of is that I might need better bypassing / decoupling. Right now I'm using a single 0603 0.1uF cap on each power pin. Is that enough? Does the package size make a difference? Would having multiple caps in parallel help? I'd love to hear any advise.