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Thread: Need advice for ESD proofing my Teensy 3.2 designs

  1. #1
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    Need advice for ESD proofing my Teensy 3.2 designs

    Hi all,

    I'm trying to get my designs to be ESD proof so that I can pass EMC immunity testing. The board is a 2-layer design with a ground plane on the bottom and it's installed in a plastic enclosure. I'm using TVSs, diode protected inputs, and I've set unused pins to OUTPUT LOW, but I'm still seeing my devices 'freeze' when an ESD event floods the ground plane (about 1 in every 20 events)

    Without recessing my input connectors (preventing ESD from ever reaching the ground plane), are there any strategies for keeping a device stable when a ESD event discharges to the ground plane? The only thing I can think of is that I might need better bypassing / decoupling. Right now I'm using a single 0603 0.1uF cap on each power pin. Is that enough? Does the package size make a difference? Would having multiple caps in parallel help? I'd love to hear any advise.

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  3. #3
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    That is hilarious! Thank-you for that.

  4. #4
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    Is the ground plane referenced to all the other rails or are only the rails and ports referenced to ground? That is, if the ground plane is about to lift beyond rails, will the TVSs safely prevent that? Also, better decoupling is always good, especially low ESR capacitors, so the caps can quickly "eat" the energy. Keep lines and wires as short as possible to the decoupling, to prevent inductance blocking the efficiency.

    Also it is important to avoid ringing and resonance in the circuit, caused by wires and long lines, and obviously inductivities, coils and capacitors distributed over several spots on a line, forming a resonant circuit. Anyway, plate ringing is alsways a problem of ground planes, if being exposed to high energy impulses. There are design options that can reduce plate ringing.

    Detached closed coils and rings can be used to dissipate an impulse and spred it's energy into a wider spectrum, so lowering the impact at a possible resonant spot, but here we come to science.

  5. #5
    Senior Member PaulStoffregen's Avatar
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    Protection measures like capacitors and TVS diodes can be much more effective if there is a resistor in series, between them and the horribleness of the outside world.

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    Assumed that already done, when @yeahtuna wrote about having already done TVS protection.

    @yeahtuna: what are the specs required? That would make it easier to design a protection. The standards for Electromagnetic Compatibility refer more to emission than ESD protection, which could also be fulfilled, if a device can be reset without damage. Is a MIL oder Medical reliability required, or even a special envireonment?

  7. #7
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    I've order three different flavors of the same design and I'll build them next week. I basically added a bunch of power jumpers (0 ohm resistor) so that I can make my traces more direct. I'll post my findings when I'm done testing.

    Paul, if I have a ground plane on the bottom of the board, do I need to isolate a little ground island on the bottom layer for the crystal oscillator? Is there anything I should be doing on the top layer for the crystal?

  8. #8
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    So I managed to resolve my ESD issues. I can't be entirely sure what made the difference, but here are some of the things I did. It would be great if others could comment on whether the changes I made are good choices or not.

    1. When possible, I turned my VCC traces into nice thick polygons.
    2. I switched to 0402 0.1 uF bypass caps so that I could place them as close to the power pins as possible.
    3. I used a few 0 ohm jumpers to route power over signal traces to avoid making cuts into the ground plane
    4. I made a gap in the ground plane around three sides of the crystal to protect it from any ESD currents in the ground plane.

    I zapped the device with a BBQ lighter about 100 times and it didn't even do a soft restart, so I think I'm on the right track.

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