Hi everyone. I'm looking for some advice on approaching the following:

Current
I'm reading 16x IC outputs (which drive LEDs) from a cascaded set of 2x upd6345 Serial to Parallel ICs. This works, but obviously takes up a lot of i/o for reading 16x outputs (Teensy 3.5 - so plenty of pins, but it feels "dumb" to be using them on the parallel output side of the shift register)

Target
Given the ICs convert serial, I'm looking to read in the serial stream. The ICs use the following for input:

  1. SIN: Serial Data Input (pin 13, usually high, data low)
  2. SCK: Clock (pin 14, usually low, clock high)
  3. EN: Output Enable (pin 2) this enable is high for 80% of the time (when data is in, and the LEDs display the value), and low for 20% when serial data is being clocked into the register.

Approach
I've had a look around for the last 10 days, and I'm not sure on the way forward. I essentially want to read the clock and data as a stream for 16 bits during when the enable signal is low. For info, the clock signal is quite complex, as it's used elsewhere in the circuit with other data lines and enables. It's not too fast though at c. 100khz.

Do I use SPI? but where this isn't a classic Master scenario - I'm only looking to read in, and there's no master-slave "relationship".
Do I implement a simpler non-SPI read, using the data and clock signals and conditioned or interrupt driven by the enable falling?

I'm more of an analogue electronics person of years ago, and I'm struggling with this one for some reason (have done OK with CAN and LIN bus). I've looked at many SPI examples and cannot get anything to work - mostly because they're either master or a slave in a master scenario - here I'm just wanting to decode serial and clock with an enable triggered condition.

Does anyone have experience of performing something similar? I would love to know how you approached it, and if possible any code snippets or examples would be very welcome.