Forum Rule: Always post complete source code & details to reproduce any issue!
Results 1 to 12 of 12

Thread: i2s slave on teensy 4

Threaded View

  1. #1
    Junior Member
    Join Date
    Jun 2019

    i2s slave on teensy 4


    I have a Roland MV8800 sampler. It has an expansion header that provides four "i2s" output streams (8 channels) and an input stream (2 channels). Additionally it has a ttl level midi in and out. I'd like to interface these to a teensy 4.0 and access the midi and audio via usb.

    I've succesfully tested the "i2s" streams using a PCM5102 DAC boards and by looping back an output stream to an input stream.

    The audio streams are 24bit 44.1 khz in a format described as "left justified". It is basically i2s but with the frame sync arriving one bit clock later. There are register bits called frame synce early in I2S_RCR4_FSE and I2S_TCR4_FSE that, according to documentation, can be used for this behaviour if they are cleared.

    The MV8800 is always clock master and offers no configuration in terms of sample rate, format etc.

    For a first pass, I'd like to do stereo in/out loopback at 16bits.

    The pinouts provided in the Audio System Design Tool for the AudioOutputI2Sslave and AudioInputI2Sslave objects are confusing. Are they correct? I would have thought the connections would be MCLK on 23, BCLCK 21, LRCLK 20 and DATA Out on 7 and DATA Out on 8.

    Using the i2s slave objects and the pin's I've mentioned I get noise out that changes depending on what I send to the input.

    I have modified the register settings in output_i2s2.cpp to clear the frame sync early. I've also changed the frame size registers (I2S_TCR4_FRSZ and I2S_RCR4_FRSZ) to 3-1 for the 24bits.

    Any pointers on where I would truncate the 24bits down to 16? Any other pointers would be much appreciated.
    Last edited by widdly; 03-26-2020 at 12:38 AM.

Posting Permissions

  • You may not post new threads
  • You may not post replies
  • You may not post attachments
  • You may not edit your posts