Teensy 3.2 Pulse Capture.

Status
Not open for further replies.

Dave W.

Member
I am trying to capture the down pulses on a Teensy 3.2 and having trouble with the initialization. The attached is a minimalist program to prove functionality. It is based on FreqMeasure (thanks Paul). At the moment it disappears into interrupt-land as soon as enabled. This is demonstrated by the LED in setup failing to pulse.

#define LED 13
volatile uint16_t u16_flash;

// setup for timing
void setup_timer1(void)
{
FTM1_SC = 0;
FTM1_CNT = 0; // start count from 0 (pg 781)
FTM1_MOD = 0xFFFF; // use full range of counter (pg 782)
FTM1_SC = 0x4F; // enable overflow interrupt & use system clock & divide by 128 (pg 780)

NVIC_SET_PRIORITY(IRQ_FTM1, 48);// set priority (pg 65 + CMSIS_Core doc)
FTM1_C0SC = 0x48; // chanel 0 enable & interrupt on falling edge (pg 784)
*portConfigRegister(3) = PORT_PCR_MUX(3);
NVIC_ENABLE_IRQ(IRQ_FTM1); //enable interrupts (pg 65 + CMSIS_Core doc)
}
void setup() {
setup_timer1();
pinMode(LED, OUTPUT);
digitalWrite(LED, HIGH);
delay(200);
digitalWrite(LED, LOW);
delay(200);
}

void loop() {
if (u16_flash) {
digitalWrite(LED, HIGH);
delay(200);
digitalWrite(LED, LOW);
delay(200);
--u16_flash;
}

}
void ftm1_isr(void) {// ISR(TIMER1_CAPT_vect)
if (FTM1_C0SC & 0x80){ // timer captured a falling edge
u16_flash = 1;
}else if (FTM1_SC & 0x80) { // timer overflow
u16_flash = 2;
} else u16_flash = 3;
}
 
I don't know if the rest is OK, but at least I don't see any code clearing the timer overflow flag?
 
Thanks, Luni. You Nailed it.
"Set by hardware when the FTM counter passes the value in the MOD register. The TOF bit is cleared by reading the SC register while TOF is set and then writing a 0 to TOF bit. Writing a 1 to TOF has no effect."
No matter how often I read that I THOUGHT reading the register cleared it.
 
Status
Not open for further replies.
Back
Top