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Thread: Teensy 4.1 Beta Test

  1. #26
    Senior Member PaulStoffregen's Avatar
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    Quote Originally Posted by Jean-Marc View Post
    I am very impatient to experiment with the QSPI memory chip on that device...
    Any clue of the device that could be soldered directly underneath? Something we could pre-order?
    The RAM chips I've tested are IPS6404L-SQ-SPN and ESP-PSRAM64H. Both seem to work fine, and very likely are exactly the same silicon inside.

    The flash chip tested so far is W25Q128JVSIQ.

  2. #27
    I've been looking forward to this board since the December thread... I've been designing a new breakout for the CS42448 with DC coupled IO at Eurorack levels especially for this board:

    Click image for larger version. 

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    I'm glad to see the pinout discussed then hasn't changed much. The PSRAM and flash chips are going to make this one heck of a platform to build on. I'm going to triple check this design and try to get it fabbed ASAP.

  3. #28
    Senior Member+ MichaelMeissner's Avatar
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    Quote Originally Posted by recursinging View Post
    I've been looking forward to this board since the December thread... I've been designing a new breakout for the CS42448 with DC coupled IO at Eurorack levels especially for this board:
    Note, the USB host has 5 pins in the Teensy 3.6. As I understand it, it is due to the USB support having two grounds. Within the Teensy, we have to fake it by having the two tied together. You may or may not want to add that 2nd ground pin.

  4. #29
    Senior Member+ KurtE's Avatar
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    With the T4.1 and USB connection. As Michael mentioned, unless your board has a built in USB connector, where you are tying in the ground for the USB shield...

    Note: On USB connector pin locations. I know that in the older closed thread talking about this upcoming board, there were tentative pin locations mentioned. I believe that they moved since then. At least with the early beta boards, I think they are at the same position as the T3.6 pins.

    But as Paul mentioned some things were changed since then, so it is possible they moved again (but I hope not).

  5. #30
    Senior Member+ MichaelMeissner's Avatar
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    Quote Originally Posted by KurtE View Post
    With the T4.1 and USB connection. As Michael mentioned, unless your board has a built in USB connector, where you are tying in the ground for the USB shield...

    Note: On USB connector pin locations. I know that in the older closed thread talking about this upcoming board, there were tentative pin locations mentioned. I believe that they moved since then. At least with the early beta boards, I think they are at the same position as the T3.6 pins.

    But as Paul mentioned some things were changed since then, so it is possible they moved again (but I hope not).
    I'm of two minds for the USB pin placement. One one hand, it can be useful to maintain backwards compatibility with the Teensy 3.5/3.6 in terms of the pin position. On the other hand, it would be nice if those pins were aligned on 0.1" boundaries. No matter which way it is, it would be nice to have accurate positions so other people can make PCBs.

  6. #31
    Senior Member blackketter's Avatar
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    Looking forward to getting my board. Any chance for a draft schematic?

  7. #32
    Senior Member+ defragster's Avatar
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    Quote Originally Posted by blackketter View Post
    Looking forward to getting my board. Any chance for a draft schematic?
    IIRC the Schematic is a separate follow on ART task - sometime after production release … in good times. For a rough draft see pjrc.com/teensy/schematic40.png Just adds some 20+ pins, posted 'beta card' and reading KurtE's pin list would let those be mapped out … with pin# changes for SD card, ethernet pins {multiple into chip and 6 out}, QSPI's pins shared with two added unique CS pins, and the filler edge pins where 4.0's 10 bottom pins to edges didn't fill all new locations. Other than QSPI's (&device USB ~replacing migrated USB Host pins) - nothing on the bottom but various tiny parts and test points.

  8. #33
    Senior Member blackketter's Avatar
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    Quote Originally Posted by defragster View Post
    IIRC the Schematic is a separate follow on ART task - sometime after production release … in good times. For a rough draft see pjrc.com/teensy/schematic40.png Just adds some 20+ pins, posted 'beta card' and reading KurtE's pin list would let those be mapped out … with pin# changes for SD card, ethernet pins {multiple into chip and 6 out}, QSPI's pins shared with two added unique CS pins, and the filler edge pins where 4.0's 10 bottom pins to edges didn't fill all new locations. Other than QSPI's (&device USB ~replacing migrated USB Host pins) - nothing on the bottom but various tiny parts and test points.
    He he. Yes, it's the same as Teensy 4.0, except where it's different.

    It's the details of those differences that really matter. The Teensy schematics are really useful, just hoping that a rough draft of the 4.1 schematic could be released sooner rather than later.

  9. #34
    Senior Member+ KurtE's Avatar
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    Quote Originally Posted by blackketter View Post
    He he. Yes, it's the same as Teensy 4.0, except where it's different.

    It's the details of those differences that really matter. The Teensy schematics are really useful, just hoping that a rough draft of the 4.1 schematic could be released sooner rather than later.
    I am guessing that this will not be released for the same reasons that no photos are allowed up on the forum as to protect PJRC...

    But as @defragster mentioned, you can gleam a lot of the information from the earlier thread talking about what is added and look at the current Teensyduino Beta releases which shows which physical IO pins are connected up to which logical Arduino pin. That is how I put together the information I posted earlier.

  10. #35
    Senior Member PaulStoffregen's Avatar
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    We're down to just 8 pre-production boards left. If you're on the list and want one, now's the time.

    Please understand Robin and I are crazy busy here trying to keep PJRC running without 2 employees who can't work due to Oregon's shelt-in-place order. There's only so many hours in every day, and to be honest, even in the best of times I don't always keep up with everything.

    I must work on the pinout card before the schematic. Those need to be sent to the printing company next week if we're going to have pinout cards in time for the release next month. They're printed on an offset press, so they have a longer lead time than using a lower quality printing process.

    At this point, I'm really not worried about releasing the schematic. It's simply a matter of limited hours in the day.

  11. #36
    Quote Originally Posted by MichaelMeissner View Post
    I'm of two minds for the USB pin placement. One one hand, it can be useful to maintain backwards compatibility with the Teensy 3.5/3.6 in terms of the pin position. On the other hand, it would be nice if those pins were aligned on 0.1" boundaries. No matter which way it is, it would be nice to have accurate positions so other people can make PCBs.
    While not critical for this project yet, It might save me a future revision if someone could confirm that those pins are at 3.5/3.6 positions.

  12. #37
    Senior Member+ defragster's Avatar
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    Quote Originally Posted by recursinging View Post
    While not critical for this project yet, It might save me a future revision if someone could confirm that those pins are at 3.5/3.6 positions.
    Only Paul can say for certain - until the first new board is delivered … but the early T_4.1 board does present the USBHost pins on T_4.1 the same as the T_3.6 … with offset from outer row pins - that was the expected position before it was made - and no comments made about it being moved on the minor rev being shipped now.

  13. #38
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    Hi,

    Quote Originally Posted by defragster View Post
    Layout added on the bottom side to solder 2 QSPI memory chips. One larger/FLASH like Audio board, the other smaller pitch RAM fits the common 8MB PSRAM.
    The three RAM/flash chips Paul has tested all have 1.27 mm pitch as far as I can tell. Is that the pitch for both sets of pads?

  14. #39
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    I've been tickled pink at being recognized as potentially useful beta tester -- Thanks!
    But as of now, I have my hands full (with stuff involving 4.0).

    I will be getting a Teensy 4.1 later though, when they become widely available; hopefully Mandu.fi will order/get a batch then.

    In particular, the larger number of pins on 4.1, and the Ethernet interface, makes it a perfect choice for finally implementing my curved velocity controlled Cartesian robot (3D printer or CNC). (The math essentially implements an iterator that walks the intersections between a 2D cubic curve and integer coordinates, producing the exact correct step list tracing the curve; with a velocity controller tied into stepper feedback (digital Hall angle sensors or AS5048 sensor chips at the stepper motor butt ends) to recover lost steps, and generating the actual pulse trains. I don't know yet of any slicer that produces curves instead of lines, or can use thinner layers on the outside compared to inner structural lattices, so this is a rather low-burn, long-term project... I really just found the math to be much, much fun to work out some years ago.)

    As of now, I'm investigating different methods of implementing "better" Teensy 4.0 CDC ACM, specifically for robust USB serial/tty on Linux with higher transfer rates. The reason is I believe Teensy to be most suitable for implementation of custom scientific sensors (stuff from 24-bit ADCs like TI ADS1256 to full data acquisition chips like 8-channel 16-bit AD7606, to MAX31865 PT100/PT1000 temperature sensors) -- some colleagues needing both temperature sensors and 0-10V voltage sensors, connected to a Linux SBC --, but considering average scientist programming skill level, being able to use the termios/tty/USB Serial interface from pure Python3 (instead of USB bulk transfers) would be much more practical. As of now, the CDC ACM/USB Serial on Teensy 4.0 is likely to deadlock with large transfer rates.

  15. #40
    Senior Member+ KurtE's Avatar
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    I am pretty sure the pads are different

    I think the memory chips use the SOP-8 (150) sizing.
    And the Flash is SOIC-8 (208) size.

    But then again I could be wrong.

  16. #41
    Senior Member+ defragster's Avatar
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    Quote Originally Posted by AlanK View Post
    Hi,
    The three RAM/flash chips Paul has tested all have 1.27 mm pitch as far as I can tell. Is that the pitch for both sets of pads?
    Pin pitch is the same - but chip package/body size is different between the FLASH and the RAM chips

  17. #42
    Senior Member+ KurtE's Avatar
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    @Paul - I just did a Pull Request (https://github.com/PaulStoffregen/cores/pull/466)
    That added to the Serial port objects those pins that are associated with the bottom pins (memory chip locations).

    I did compile a test sketch for T4 and T4.1 so make sure things still compile, but I did not test out these ports as don't have a T4.1 which has these pins available...

  18. #43
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    Quote Originally Posted by defragster View Post
    Pin pitch is the same - but chip package/body size is different between the FLASH and the RAM chips
    Thanks for clarifying that. I'm thinking about accessing those pads using pogo pins - I have two 1Gb flash chips but they are SOIC-16.
    All the best,
    Alan
    Last edited by AlanK; 04-24-2020 at 07:27 AM.

  19. #44
    Senior Member PaulStoffregen's Avatar
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    Quote Originally Posted by KurtE View Post
    I just did a Pull Request
    Merged. Also pulled in Mike's latest RA8875.

    I'm going to package up 1.52-beta3 with Teensy 4.1 in the Tools > Boards menu. Meant to do is yesterday, but spent way too much time setting up a Jetson Nano to look into why the installer crashes, but runs fine on Jetson TX2.


    but I did not test out these ports as don't have a T4.1 which has these pins available...
    I'll send you one of the pre-production boards. I believe we still have 6 or 7 left.

  20. #45
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    Will the 4.1 still be without hardware debugging option (JTAG)?

  21. #46
    Senior Member+ mjs513's Avatar
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    Quote Originally Posted by PaulStoffregen View Post
    Merged. Also pulled in Mike's latest RA8875.

    I'm going to package up 1.52-beta3 with Teensy 4.1 in the Tools > Boards menu. Meant to do is yesterday, but spent way too much time setting up a Jetson Nano to look into why the installer crashes, but runs fine on Jetson TX2.
    Morning Paul
    Just saw your post on packaging up a 1.52-beta 3. Thanks for pulling in the changes to the RA8875. Could you also pull in the changes we made to the ILI9488 lib as well. There have been several changes to that library as well. Also the T4 Quad Encoder library was updated to support the T4.1 as well as to fix a few pin XBAR pin configurations.

  22. #47
    Senior Member PaulStoffregen's Avatar
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    Ok, pulled in that stuff.

    Looks like the ILI9488 changes move files to new locations. Running the installer "on top of" an existing installation will leave the old files, since it doesn't know to delete them.

  23. #48
    Senior Member PaulStoffregen's Avatar
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    Quote Originally Posted by MartinZ View Post
    Will the 4.1 still be without hardware debugging option (JTAG)?
    No JTAG pins. It will be essentially the same as Teensy 4.0, but with more I/O stuff added.

  24. #49
    Senior Member+ mjs513's Avatar
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    Quote Originally Posted by PaulStoffregen View Post
    Ok, pulled in that stuff.

    Looks like the ILI9488 changes move files to new locations. Running the installer "on top of" an existing installation will leave the old files, since it doesn't know to delete them.
    Thanks Paul. If you want I can move the files out of src and put them back where they were or can wait.

  25. #50
    Senior Member+ KurtE's Avatar
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    @mjs513 and @Paul I am wondering what happens if we put in more or less empty files at the top level... Will it work? Or alternatively if we need maybe the top level .h is simply:
    #include "src\ILI9488_t3.h"

    If that would work?

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