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Thread: New Teensey 4.0 appears DOA

  1. #1
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    New Teensey 4.0 appears DOA

    Hey all, I just got a new teensey 4.0 in the mail. The board looks like it didn't have the best time in shipping, the usb port was crushed a bit and the antistatic bag was pulled so tight it almost looked vacuum sealed. When I plug it into a pc i get no blink and no connection from either the pc or the arduino ide, across multiple pc's and multiple usb cables. On usb I get 5v to both 5v pins but nothing to the 3.3v pins, and still nothing with 5v hooked up from an external power source. Is there something I'm missing or is it gone?

  2. #2
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    Teensy 4.0 is particularly complex as PCB goes.
    From the sound of it, I am afraid the rude shipping may have broken some traces.
    What if you directly feed it 3.3V from the "3.3v" pin? This bypasses the onboard regulator.

  3. #3
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    Thats what I figured
    Feeding the 3.3 pin also does nothing.

  4. #4
    Senior Member PaulStoffregen's Avatar
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    To try powering with 3.3V only, connect the 3.3V power to first to VBAT. Or connect a coin cell to VBAT. Then connect to the main 3.3V power line *after* VBAT has been powered up.

  5. #5
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    Wow Paul, is it documented somewhere? Why is this VBAT procedure needed for 4.0 (I ask because I never used it, not even on 4.0)?

  6. #6
    Senior Member PaulStoffregen's Avatar
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    Quote Originally Posted by XFer View Post
    Why is this VBAT procedure needed for 4.0
    The chip wants it's RTC & power management (or "SNVS" in NXP's lingo) section powered up first. When you power from VIN or VUSB, that happens automatically, because the chip turns on the 3.3V regulator enable pin when it's ready for 3.3V power.

    When you power up by directly connecting 3.3V, the SNVS power is 1 diode drop "behind". If the 3.3V rises up quickly, it works. But if 3.3V rises slowly, like with power supplies that have a large capacitor or a "soft start" circuit, the chip can get 3.3V power before the SNVS power. The chip only boots up if SNVS power is applied first or simultaneously, relative to the 3.3V power.


    Wow Paul, is it documented somewhere?
    NXP documents it in the reference manual and hardware design guide. But they don't always use the clear and blunt sort of language I do, so it's easy to miss these little details about the chip, buried within those thousands of pages.

    Truth is, I missed many of these little things when first using the chip (in 2018). Some others I missed until well into the beta test in 2019. These details are subtle and easy to overlook, until they bite you by the chip not working.

  7. #7
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    Thank you very much. Great explanation.

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