martianredskies
Well-known member
Curious to know how the audio rate clock is derived. Is it a flextimer?
It depends on the first input or output you instantiate in your code.
On Teensy 3, most use either the PDB timer or the I2S, which gets MCLK from a mult/div circuit from the system clock.
On Teensy 4, usually I2S is used, but it gets MCLK from a dedicated PLL with very fine grained control over the frequency, rather than the relatively coarse combinations of mults & divs on Teensy 3.
But if using the slave mode inputs or output (on ether Teensy 3 or 4), the external clock controls the audio sample rate.