What Timer is used to derive the 44.1khz clock the audio library runs at?

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depends on device (ADC, I2S) and Teensy (3.x, 4.x)
as you can see in check the audio library
 
It depends on the first input or output you instantiate in your code.

On Teensy 3, most use either the PDB timer or the I2S, which gets MCLK from a mult/div circuit from the system clock.

On Teensy 4, usually I2S is used, but it gets MCLK from a dedicated PLL with very fine grained control over the frequency, rather than the relatively coarse combinations of mults & divs on Teensy 3.

But if using the slave mode inputs or output (on ether Teensy 3 or 4), the external clock controls the audio sample rate.
 
It depends on the first input or output you instantiate in your code.

On Teensy 3, most use either the PDB timer or the I2S, which gets MCLK from a mult/div circuit from the system clock.

On Teensy 4, usually I2S is used, but it gets MCLK from a dedicated PLL with very fine grained control over the frequency, rather than the relatively coarse combinations of mults & divs on Teensy 3.

But if using the slave mode inputs or output (on ether Teensy 3 or 4), the external clock controls the audio sample rate.

Thanks, Paul. I assume using inbuilt DAC/ADC means it's deriving the clock from the programmable delay block. I'll read up on that in the reference manual.
 
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