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Thread: {Teensy 4.1} 8-Bit Parallel I/O?

  1. #1
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    {Teensy 4.1} 8-Bit Parallel I/O?

    Hello everyone!

    Currently, I'm working on a way to control an Super Nintendo Audio Processing Unit via a Teensy 4.1 in a portable form factor.

    If you aren't aware, early models of the Super Nintendo have it's music and sound effect hardware on a modular daughterboard separate from the mainboard, commonly referred to as the APU. It contains an SPC700 audio processor, the Digital Sound Processor (DSP), which processes the output generated by the SPC700 and dumps out a digital stereo signal, and a DAC, which takes the output from the DSP and spits out line level audio, you know, things that DACs do. :P

    The SNES would communicate over a parallel 8-bit bus, with a 4 bit addressing bus, and push one byte to the SPC at a time. The SPC700 and the SNES CPU has 4 dedicated registers dedicated to communication between the two, and each register has a 2 byte buffer, one for incoming data, one for outgoing. This allows for each register to be written to and read from at the same time, with only a possibility of corruption when one side reads at the same time the other side writes.

    Essentially what I'm trying to do here is swap the SNES portion of this system w/ a Teensy, which would allow me to upload SPC processor state files (*.SPC) and play them off real hardware, w/o emulation. In layman's terms, SNES music w/o the SNES!

    Currently, I'm not sure how I would be able to operate a parallel bus w/ a Teensy 4.1. I've seen w/ the Atmel Teensy's and other AVR chips that you can take advantage of port registers and map pins to each bit of a port register, and read/write to that. I've done some digging around and I can't seem to find any real way to do what I'm trying to do here, but maybe you all have a solution?

    If you would like to see current source code, design documentation, further communication documentation between the SPC and the SNES, and other stuff, I have a Github repo that I've been keeping everything. You can find that here.

    Any suggestions are much appreciated. Also, this is my first post here. Glad to be here! Teensy seems like such a great platform and I've had tons of fun developing on it.

  2. #2
    Senior Member+ defragster's Avatar
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    Welcome! T_4.1 does have 16 pins on one 32 bit port.

    ... probably not doing it right myself yet so not yet shared - reading 8 pins and shifting them out on 8 others when they change ... looks right on the four pins under test so far.

    here are some found forum links using port bit reads and writes on T_4.1:
    Teensy-4-0-First-Beta-Test
    Parallel-IO-is-it-possible
    port-and-toggle-question-T4
    Reading-multiple-GPIO-pins-on-the-Teensy-4-0-quot-atomically-quot

    The T_4.0 and 4.1 use the same processor - the T_4.1 just has added pins - see the PJRC schematic or other shared docs
    KurtE's PDF of T_4.1 pins with port info or his XLS: github.com/KurtE/TeensyDocuments/blob/master/Teensy4%20Pins.xlsx

  3. #3
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    Quote Originally Posted by defragster View Post
    Welcome! T_4.1 does have 16 pins on one 32 bit port.

    ... probably not doing it right myself yet so not yet shared - reading 8 pins and shifting them out on 8 others when they change ... looks right on the four pins under test so far.

    here are some found forum links using port bit reads and writes on T_4.1:
    Teensy-4-0-First-Beta-Test
    Parallel-IO-is-it-possible
    port-and-toggle-question-T4
    Reading-multiple-GPIO-pins-on-the-Teensy-4-0-quot-atomically-quot

    The T_4.0 and 4.1 use the same processor - the T_4.1 just has added pins - see the PJRC schematic or other shared docs
    KurtE's PDF of T_4.1 pins with port info or his XLS: github.com/KurtE/TeensyDocuments/blob/master/Teensy4%20Pins.xlsx
    Oh wow, thanks for the quick reply and all this info! I'll have a look at some of these and see if I can come up with some solution. I'll leave any further questions here as well in relation to this. Thanks again!

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