SPI2 pins are not as easy to get to on T4.1...
Here is an image of my own Excel page - with extended card like view, which I have posted several times.
You will see that the SPI2 pins show up in two different places (sort of three but...).
First off they are on the SDCard area. I have played around before with an SDCard breakout, where for example I have run a small display using these pins.
The second place are the bottom memory chips area. There are pads for two chips, which have the identical signals on them except each one has their own chip select.
Note in this case Chip select is for a different type of SPI: FlexSPI (used by memory system...) and the LPSPI (what we think of as SPI)...
As for our mention of SPI CS pins. The majority of libraries do not make use of the hardware specifics of the CS pins, including the SPI library. Most sketches and libraries simply do something like digitalWrite(CS_PIN, LOW); <Do there spi stuff>; digitalWrite(CS_PIN, HIGH);...
So in these case makes no difference.
However there are some libraries, especially for T3.x that DO make use of the hardware CS pins. Example ILI9341_t3 library, which on a T3.x you can encode the state of up to 4 CS pins for each transfer by encoding this data when you use the PUSHR register to add stuff to the SPI queue. This for example allows us to encode the state of the DC (Data, Command) signal on the queue and as such the hardware takes care of switching the state of this signal at just the right time. Otherwise your code has to wait until it knows the last of the bits associated with the old state of this signal is, before it can change the state and then push the next data on the queue to be output. So these libraries can make much usage of the SPI speeds (i.e. less gaps of output).
Also if you have code that for example tries to use SPI as a slave device instead of being the master, than the hardware requires us to use a CS pin in CS mode that the system monitors to know when an SPI operation is happening...