grease_lighting
Well-known member
I'm trying to make an I2C decoder that uses the PORTx_PCRn register to create DMA / IRQ requests as was described in this POST.
I'm using a TEENSY 3.2 running at 96MHz and would like to be sure that my routines are not taking too long to execute. For now that is trying to keep within 10uS clock cycles. I'm doing this in my code to see how long it takes to execute. I'm viewing the pins with a scope to measure the time it takes.
I'm assuming the code executes linearly and does not overlap and the time the designated pin is high is approximately how long the code within takes to execute.
Is this a valid assumption?
I'm using a TEENSY 3.2 running at 96MHz and would like to be sure that my routines are not taking too long to execute. For now that is trying to keep within 10uS clock cycles. I'm doing this in my code to see how long it takes to execute. I'm viewing the pins with a scope to measure the time it takes.
Code:
if (p1==0x20000) {digitalWrite(2,HIGH); busData[ptr] |= 0x00000000; busData[ptr] = busData[ptr] << 1; bitCntr++; digitalWrite(2,LOW);}
if (p1==0x30000) {digitalWrite(3,HIGH); busData[ptr] |= 0x00000001; busData[ptr] = busData[ptr] << 1; bitCntr++; digitalWrite(3,LOW);}
I'm assuming the code executes linearly and does not overlap and the time the designated pin is high is approximately how long the code within takes to execute.
Is this a valid assumption?