Teensy 4.1 hard reset

Status
Not open for further replies.
Hi, I have a project that is using a Teensy 4.31 board. What I need is to implement an external watchdog (I finally found TPL5000 that suits my needs) and I want this watchdog to do a hard reset on the Teensy.
I know that there is a built in watchdog (I will use that also), but I need this external too.
When I pull the PROG pin to GND it puts the Teensy in programming mode, and then the program halts forever. (until it receives new program through USB or until power is reset).

PS: first time on the forum, project is quite big and I'm stuck at this, and did not find any other info about hard reset on teensy 4.1.

Thank you for your help.
 
The Teensy 4.x's do not have an exposed Reset pin.

There is a library using the On/Off pin. IIRC the code can set up a wake time min off time in ~2 seconds. Hitting the running T_4.x would take it to sleep - and if RTC was setup with Wake time it will restart fresh, though not immediately. Resolution is 1 sec, but asking for 1 sec can end up zero as the clock runs, so min ask is 2 sec. I know there is at least one thread with this and library along with it.

Seems there was a posted Internal Watchdog library so that need not be re-created.
 
The Teensy 4.x's do not have an exposed Reset pin.

There is a library using the On/Off pin. IIRC the code can set up a wake time min off time in ~2 seconds. Hitting the running T_4.x would take it to sleep - and if RTC was setup with Wake time it will restart fresh, though not immediately. Resolution is 1 sec, but asking for 1 sec can end up zero as the clock runs, so min ask is 2 sec. I know there is at least one thread with this and library along with it.

Seems there was a posted Internal Watchdog library so that need not be re-created.

Thank you very much.

So if there is no RESET pin, then I figure I can HARD restart the Teensy some other way:

1. The TPL5000 would send a pulse (15ms) to the PROG pin(this would leave the Teensy is some OFF mode awaiting for USB program to upload).
2. The same pulse at 1. would activate a timer (555) that would cut the 5V power (using a MOSFET) to the Teensy for a few seconds (enough to make sure that everything is SHUT OFF.
3. When the timer elapses the MOSFET will return the 5V power to the Teensy and the program will run from START.

Concerns: would this procedure affect in some way the bootloader (since it cuts power right after the bootloader starts to await for programming). Will this be an issue (permanent damage to the bootloader/Teensy) if for some unforseen reason (bad programming, interference etc.) this will hapen very often?
Thanks again.
 
Concerns: would this procedure affect in some way the bootloader (since it cuts power right after the bootloader starts to await for programming).

Turning the power off while the bootloader is running should be fine.

However, if you do this while your PC is sending new data, the final state of the flash memory will end up with wrong data. The bootloader won't be harmed, but you can expect the IMXRT chip to not be able to boot up when its flash memory has a partially written image.


Will this be an issue (permanent damage to the bootloader/Teensy) if for some unforseen reason (bad programming, interference etc.) this will hapen very often?

The bootloader should be safe.


2. The same pulse at 1. would activate a timer (555) that would cut the 5V power (using a MOSFET) to the Teensy for a few seconds (enough to make sure that everything is SHUT OFF.

It may take quite some time for the capacitors to completely discharge, especially the one connected to VDD_SNVS_IN. If you want to speed this process up, Teensy 4.1 has small test points on the bottom side to access that power input and all the others with capacitors connected. The really extreme solution would connect a 100 ohm resistor to GND using a N-channel mosfet for each of those points. Our bed-of-nails test fixture does this, which allows rapidly turning off over just a few milliseconds (which is the reason those test points exist).
 
However, if you do this while your PC is sending new data, the final state of the flash memory will end up with wrong data. The bootloader won't be harmed, but you can expect the IMXRT chip to not be able to boot up when its flash memory has a partially written image.

Thanks for the reply, indeed I forgot that I won't be able to program the Teensy when the external watchdog is working, as it might reset while uploading. I will have to disable the watchdog when uploading firmware.
If this would happen I would still be able to reprogram the IMXRT chip even if it has a currupt flash memory, right?

It may take quite some time for the capacitors to completely discharge, especially the one connected to VDD_SNVS_IN. If you want to speed this process up, Teensy 4.1 has small test points on the bottom side to access that power input and all the others with capacitors connected. The really extreme solution would connect a 100 ohm resistor to GND using a N-channel mosfet for each of those points. Our bed-of-nails test fixture does this, which allows rapidly turning off over just a few milliseconds (which is the reason those test points exist).

I'm designing a custom board that will incorporate the Teensy 4.1 but connecting to those test points will be to hard to do manually.
I think that a few seconds without power will be enough to discharge the capacitors well below 3.3V and stop the program (will do some tests with an oscilloscope).
 
This thread T4-software-restart-procedure-and-freeram-function is one where the On/Off pin was used for Teensy Restart.

That was when the standard reset found to be in need of a PJRC fix documented in that thread.

It points to a library github.com/FrankBoesing/T4_PowerButton that was ref'd in p#2.

Once the RTC section is programmed to wake it is static - so when the On/Off goes to OFF ( with the external watchdog ) - it will restart on the programmed time in seconds. That can be tested to work - and if waiting 2 secs is okay for restart it could be cleaner than external hardware.

Also note the default 5 sec delay for press of On/Off to power down is settable - that library may show that as well.
 
This thread T4-software-restart-procedure-and-freeram-function is one where the On/Off pin was used for Teensy Restart.

That was when the standard reset found to be in need of a PJRC fix documented in that thread.

It points to a library github.com/FrankBoesing/T4_PowerButton that was ref'd in p#2.

Once the RTC section is programmed to wake it is static - so when the On/Off goes to OFF ( with the external watchdog ) - it will restart on the programmed time in seconds. That can be tested to work - and if waiting 2 secs is okay for restart it could be cleaner than external hardware.

Also note the default 5 sec delay for press of On/Off to power down is settable - that library may show that as well.

I just looked at the library, and it still seems to rely on software for the reset. I don't want to do that. I confess I have little experience with Teensy, and this seems like premature optimization as I have not tested the library (I will), but I found the WDT on ATMEGA2560 uC to be somewhat unreliable (it does not work 100% as expected in about 10 out of ~200 custom boards I deployed), so I want to fully implement the hardware watchdog and reset, as a fail-safe, and I am also behind schedule, and I have no time to redo the board.

Thank you for the prompt responses sirs.
 
Status
Not open for further replies.
Back
Top