Hello,
I am currently working on a project with the ADCs listed in the title. Right now I am able to sample them at around 600 kHz at max and output all of the data over a USB port using an FT232H and a Spartan3A FPGA. The SPI data from the ADCs is 18 bits per ADC, coming in at 60MHZ over 8 lanes, each lane is a group of 4 ADCs in a daisy chain. I would like to try and replace these two parts with a single Teensy 4.1, as right now there are some issues that might be resolved by switching to a single part, and I would like to have a processor to more easily control parameters about the sampling and other parts of the system, and a convenient usb interface in order to make my life a little easier.
I know that the typical simple arduino approach using digitalRead is going to be way too slow, and probably even when using a parallel gpio read by getting the data directly from memory. Even just generating a 60 mhz SCLK seems like it might require some built in hardware in the processor.
However, I am so far thinking this will be possible by using the QSPI/FlexSPI bus on the processor, and possibly the DMA. It looks like it is made for flash memory, but the speed and bus width of the FlexSPI look like exactly what I need. I have been reading through the manual for the chip (https://www.pjrc.com/teensy/IMXRT1060RM_rev2.pdf) and it seems like I will need to configure all the FlexSPI registers for octal mode and other timing settings, write a program into the FlexSPI LUT that does a read without first writing an address, and then doing a (IP bus? AHB?) read of 72 bytes (18 bits per ADC * 4 ADC's per spi lane), possibly use the processor to transpose the bits so that my 18 bit samples are stored together in three bytes, and then send the data out over the usb port somehow. Using the timers and interrupts also ought to be able to match the timing precision I currently have with the FPGA.
I grep-ed the files in the Arduino installation directory for some of the register names listed in the manual and found the file imxrt.h which has a ton of the relevant register names and addresses defined. On page 232 of the manual I found some sample code and found some more c and h files by searching "flexspi_nand_config_t" on github but it's leading me into a web of dependencies and apprehensiveness. I would like to know if there is some kind of documentation that could have led me to finding the supporting software that already exists to help me cleanly program this spi interface, or also possibly some example code that does something similar to what I want to do, even if it is talking to flash memory instead of an ADC.
Any advice, info, needed clarification, or problems you foresee down the line would be really appreciated.
Thank you,
Rory
I am currently working on a project with the ADCs listed in the title. Right now I am able to sample them at around 600 kHz at max and output all of the data over a USB port using an FT232H and a Spartan3A FPGA. The SPI data from the ADCs is 18 bits per ADC, coming in at 60MHZ over 8 lanes, each lane is a group of 4 ADCs in a daisy chain. I would like to try and replace these two parts with a single Teensy 4.1, as right now there are some issues that might be resolved by switching to a single part, and I would like to have a processor to more easily control parameters about the sampling and other parts of the system, and a convenient usb interface in order to make my life a little easier.
I know that the typical simple arduino approach using digitalRead is going to be way too slow, and probably even when using a parallel gpio read by getting the data directly from memory. Even just generating a 60 mhz SCLK seems like it might require some built in hardware in the processor.
However, I am so far thinking this will be possible by using the QSPI/FlexSPI bus on the processor, and possibly the DMA. It looks like it is made for flash memory, but the speed and bus width of the FlexSPI look like exactly what I need. I have been reading through the manual for the chip (https://www.pjrc.com/teensy/IMXRT1060RM_rev2.pdf) and it seems like I will need to configure all the FlexSPI registers for octal mode and other timing settings, write a program into the FlexSPI LUT that does a read without first writing an address, and then doing a (IP bus? AHB?) read of 72 bytes (18 bits per ADC * 4 ADC's per spi lane), possibly use the processor to transpose the bits so that my 18 bit samples are stored together in three bytes, and then send the data out over the usb port somehow. Using the timers and interrupts also ought to be able to match the timing precision I currently have with the FPGA.
I grep-ed the files in the Arduino installation directory for some of the register names listed in the manual and found the file imxrt.h which has a ton of the relevant register names and addresses defined. On page 232 of the manual I found some sample code and found some more c and h files by searching "flexspi_nand_config_t" on github but it's leading me into a web of dependencies and apprehensiveness. I would like to know if there is some kind of documentation that could have led me to finding the supporting software that already exists to help me cleanly program this spi interface, or also possibly some example code that does something similar to what I want to do, even if it is talking to flash memory instead of an ADC.
Any advice, info, needed clarification, or problems you foresee down the line would be really appreciated.
Thank you,
Rory