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Thread: Need help with a note in the MK20D Reference Manual

  1. #1
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    Need help with a note in the MK20D Reference Manual

    All 5 V tolerant digital I/O pins are internally clamped to VSS through a ESD protection diode. There is no diode connection
    to VDD. If VIN greater than VDIO_MIN (=VSS-0.3V) is observed, then there is no need to provide current limiting resistors at
    the pads. If this limit cannot be observed then a current limiting resistor is required. The negative DC injection current
    limiting resistor is calculated as R=(VDIO_MIN-VIN)/|IIC|.
    Can someone help me understand what this is saying in more basic terms?

    Does this mean that if I have some schottky clamping diodes on an I/O to keep in within the rails +- 0.3 V, then I can get away without using a current limiting resistor, even if it's set to output and HIGH?

  2. #2
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    Quote Originally Posted by yeahtuna View Post
    Can someone help me understand what this is saying in more basic terms?

    Does this mean that if I have some schottky clamping diodes on an I/O to keep in within the rails +- 0.3 V, then I can get away without using a current limiting resistor, even if it's set to output and HIGH?
    Yes, its simple, you must prevent currents larger than IIC flowing in the protection diodes, either by a limiting resistor
    or other means (like schottkys). The restriction is only < -0.3V. The pin upper voltage is somewhat larger than +5V of
    course in a 5V tolerant pin. This is a gate-oxide limit so shouldn't depend on Vcc (for instance).

    BTW > max currents in protection diodes can lead to CMOS latch-up, so treat as a peak maximum.

    And note that a 5V tolerant pin is potentially much more static sensitive - observe full anti-static handling advice!

  3. #3
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    I currently use 220ohm current limiting resistors on some output pins that go to the outside world, but I would love to do away with them. A device I'm trying to power can't get enough juice through anything more than a 90 ohm current limiting resistor, so I'm looking for a solution.

    The current limiting resistor is there to prevent disaster in the case the output in is shorted to ground.

    After your comments, which are much appreciated, I still don't know if it's safe to remove the current limiting resistors or to replace them with something like 50 ohm resistors.

  4. #4
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    My understanding is that output pins should be limited to 10mA. Add a mosfet if you need more.

  5. #5
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    Input protection diodes only apply to inputs!

    For an output you need to avoid cooking the pad driver FETs by sticking to the max output
    current specification. For complex chips with lots of GPIO there's very little chip real-estate
    devoted to each pad driver so the current handling may be quite limited.
    A logic output is designed to drive other logic chips, or at most an LED - if you are wanting to
    drive a heavy load you need to buffer up the output suitably. This will also add significant
    protection to the chip from the outside world.

  6. #6
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    Quote Originally Posted by MarkT View Post
    Input protection diodes only apply to inputs!

    For an output you need to avoid cooking the pad driver FETs by sticking to the max output
    current specification. For complex chips with lots of GPIO there's very little chip real-estate
    devoted to each pad driver so the current handling may be quite limited.
    A logic output is designed to drive other logic chips, or at most an LED - if you are wanting to
    drive a heavy load you need to buffer up the output suitably. This will also add significant
    protection to the chip from the outside world.
    Thank you for that very clear explanation.

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