Further to the discussion in the forum:
https://forum.pjrc.com/threads/60831-Teensy4-0-and-_disable_irq-in-the-core-code?highlight=kartman
could I suggest some attention is put towards managing the interrupts in the core libraries in a more performant manner?
Rather than using __disable_irq()/__enable_irq() which has the side effect of impacting the extremely fast interrupt response of the i.mxrt1062, interrupt management should concentrate on interrupt priorities, use of the basepri register to selectively mask priorities and specific enable/disable of interrupt sources using the NVIC. This would also benefit implementing FreeRTOS and the like.
https://forum.pjrc.com/threads/60831-Teensy4-0-and-_disable_irq-in-the-core-code?highlight=kartman
could I suggest some attention is put towards managing the interrupts in the core libraries in a more performant manner?
Rather than using __disable_irq()/__enable_irq() which has the side effect of impacting the extremely fast interrupt response of the i.mxrt1062, interrupt management should concentrate on interrupt priorities, use of the basepri register to selectively mask priorities and specific enable/disable of interrupt sources using the NVIC. This would also benefit implementing FreeRTOS and the like.