Teensy 4.1 GPIO direction switching behavior

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Ralf K.

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Disclaimer: I am more a software than a hardware guy therefore*this question might be really stupid. I am already read through section 12.4 of the references multiple times but I could not find the answer. Maybe it's so obvious that they didn't even bother to write it down.

For a project I have a 8 bit directional data bus. This require continues changes of the direction via*GPIO_GDIR.As I like to avoid any collision with other GPIO usage I want to stay away from writing direct to GPIO_DR. Therefore updating the state with DR_SET*and DR_CLEAR seems more save. If possible I'd like to do it with just a DR_TOGGLE. But to do so I need to know the current state.I can read RA after switching the direction to output but this has a two wait stage penalty and would therefore not really better than using DR_SET and DR_CLEAR.*

Therefore the question is:

Is the state of a bit in DA after switching it from input to output via GDIR in a reliable defined state?*
 
To me it seems like there would be more overhead using DR_TOGGLE and keeping track of which bits need to be toggled between each write, personally I would just stick to using SET and CLEAR which is what I do. I'm not really sure if the bits stay the same when you switch from input to output, though I would lean towards it not being the same since in the data sheet it says that when it's in an input state the GPIO_DR register returns the same information as the GPIO_PSR register.
 
The typical way to do this is to use a shadow register in ram. It may be slower than what you are currently doing. The advantage of this is that you don't need to keep track of the rest of the bits in the larger than 8 sized register.

Code:
update_bus( new_data ){
static int shadow;

   DR_TOGGLE =   ( new_data ^ shadow );       // toggle the bits that are different
   shadow = new_data;
}
 
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