Disclaimer: I am more a software than a hardware guy therefore*this question might be really stupid. I am already read through section 12.4 of the references multiple times but I could not find the answer. Maybe it's so obvious that they didn't even bother to write it down.
For a project I have a 8 bit directional data bus. This require continues changes of the direction via*GPIO_GDIR.As I like to avoid any collision with other GPIO usage I want to stay away from writing direct to GPIO_DR. Therefore updating the state with DR_SET*and DR_CLEAR seems more save. If possible I'd like to do it with just a DR_TOGGLE. But to do so I need to know the current state.I can read RA after switching the direction to output but this has a two wait stage penalty and would therefore not really better than using DR_SET and DR_CLEAR.*
Therefore the question is:
Is the state of a bit in DA after switching it from input to output via GDIR in a reliable defined state?*
For a project I have a 8 bit directional data bus. This require continues changes of the direction via*GPIO_GDIR.As I like to avoid any collision with other GPIO usage I want to stay away from writing direct to GPIO_DR. Therefore updating the state with DR_SET*and DR_CLEAR seems more save. If possible I'd like to do it with just a DR_TOGGLE. But to do so I need to know the current state.I can read RA after switching the direction to output but this has a two wait stage penalty and would therefore not really better than using DR_SET and DR_CLEAR.*
Therefore the question is:
Is the state of a bit in DA after switching it from input to output via GDIR in a reliable defined state?*