Hi everyone,
I've been doing a lot of reading of old posts and could use some validation of my conclusions/help choosing the correct part values. My background is software and my understanding of EE is very limited so I apologize if any of my questions seem silly.
Project overview:
- Teensy LC
- 4x 10k pots (2 joysticks)
- a bunch of buttons
- 1khz sampling rate
- powered by USB
In my initial iteration I simply connected the pots between the 3.3v and GND. The buttons were all configured to use the internal pullup resistor and shared GND traces with the pots. This produces usable readings but there is noise/jitter as well as interference/crosstalk from the digital signals. I want to decrease the noise as much as possible so that any remaining noise can be blamed on the pots/cost limitations. The analog reads are spaced at minimum 175us apart.
From what I've read some things that would help are:
1. adding a decoupling cap near each analog input which creates a low pass filter in combination with the pot (C1 & C2)
2. adding a resistor before the cap to create a minimum resistance for the low pass filter (R1 & R2)
3. Adding a bypass cap on the 3.3v (C3)
Below is a schematic of these additions
By approximating the charge time = 5*R*C, at the maximum position of the pot (R=10k) and a max delay of 1ms (to satisfy 1khz polling rate) the decoupling caps should be 20nF? Most recommendations I have seen are for using a 0.1uF cap which introduces a significant delay. I don't 100% understand how the charge time relates to the sampling frequency tho... Is the cap fully discharged after each sample? Does the charge time apply for any change in voltage or only from 0V (i.e. do small changes have the same delay)?
I don't think #2 is necessary since I am only using the middle ~60% of the pots so the cutoff freq would range from ~4khz to ~1khz depending on position. I don't have access to a scope so I can't say what the frequency of the noise is but I would assume anything resulting from USB will be alot more than 4khz.
How would adding a series resistor affect the output voltage? Would it affect the linearity of the output?
Would #3 have any noticeable effect given that the source voltage technically doesn't matter when using non-absolute sensors? I think I would also need to connect the output of the cap to AREF which would be annoying having to use the inner pins.
Some of the other Teensys have a dedicated AGND which is connected to GND via a small inductor (I think). Is there anything I could do to recreate this/would it have any effect if the ADC is still using GND?
Other things I plan to change:
- Route the digital signals on opposite side of the pcb where possible
- Increase spacing between traces for analog signals
- Use separate GND pins for digital and analog signals (even tho they're connected)
Thanks in advance for any responses
I've been doing a lot of reading of old posts and could use some validation of my conclusions/help choosing the correct part values. My background is software and my understanding of EE is very limited so I apologize if any of my questions seem silly.
Project overview:
- Teensy LC
- 4x 10k pots (2 joysticks)
- a bunch of buttons
- 1khz sampling rate
- powered by USB
In my initial iteration I simply connected the pots between the 3.3v and GND. The buttons were all configured to use the internal pullup resistor and shared GND traces with the pots. This produces usable readings but there is noise/jitter as well as interference/crosstalk from the digital signals. I want to decrease the noise as much as possible so that any remaining noise can be blamed on the pots/cost limitations. The analog reads are spaced at minimum 175us apart.
From what I've read some things that would help are:
1. adding a decoupling cap near each analog input which creates a low pass filter in combination with the pot (C1 & C2)
2. adding a resistor before the cap to create a minimum resistance for the low pass filter (R1 & R2)
3. Adding a bypass cap on the 3.3v (C3)
Below is a schematic of these additions
By approximating the charge time = 5*R*C, at the maximum position of the pot (R=10k) and a max delay of 1ms (to satisfy 1khz polling rate) the decoupling caps should be 20nF? Most recommendations I have seen are for using a 0.1uF cap which introduces a significant delay. I don't 100% understand how the charge time relates to the sampling frequency tho... Is the cap fully discharged after each sample? Does the charge time apply for any change in voltage or only from 0V (i.e. do small changes have the same delay)?
I don't think #2 is necessary since I am only using the middle ~60% of the pots so the cutoff freq would range from ~4khz to ~1khz depending on position. I don't have access to a scope so I can't say what the frequency of the noise is but I would assume anything resulting from USB will be alot more than 4khz.
How would adding a series resistor affect the output voltage? Would it affect the linearity of the output?
Would #3 have any noticeable effect given that the source voltage technically doesn't matter when using non-absolute sensors? I think I would also need to connect the output of the cap to AREF which would be annoying having to use the inner pins.
Some of the other Teensys have a dedicated AGND which is connected to GND via a small inductor (I think). Is there anything I could do to recreate this/would it have any effect if the ADC is still using GND?
Other things I plan to change:
- Route the digital signals on opposite side of the pcb where possible
- Increase spacing between traces for analog signals
- Use separate GND pins for digital and analog signals (even tho they're connected)
Thanks in advance for any responses