Teensy4.1 MAX baud rate

[joepasquariello]

Paul does take Pull requests. So if you feel like trying a different approach, go for it.
The code was developed knowing 24mhz clock going into Serial and goal of baud maybe up to 2meg, pushing to maybe 3 or 4...

@KurtE, thanks very much for the info. I'll spend some time on it and see what I can do. The test that I did where interrupts were disabled/enabled in Print::write() was just to show that if transmit was not enabled until the end of a multi-byte write(), the OPs timing measurements would be more like what he expected from "non-blocking" writes.

Relative to T3 UART with FIFO, is there something fundamentally different about the T4 UART (or the T4 generally) that requires that interrupts be disabled in so many more places, and in particular in the "user" functions such as available(), peek(), read(), and write9bit()?

 

[KurtE]

The Hardware serial ports are different, the difficulty that kept running into was a timing window, where

when you are filling in the data and the ISR comes in asking for more data and there is none there, so it turns off one bit for interrupt for empty and turns on another for interrupt on completion, but during that time you add more data to queue and turn back on, the TE and turn off the transmit complete, it would still do the complete and ignore that the TE was turned back on...

Don't think we ever found perfect solution.

Another difference between the T3.x and T4.x is that on a lets say a T3.6 you wish to turn on the TE bit in the register atomically. There is a thing called the bit band addresses (on i3 and i4 processors) , that you can use to set that specific bit... But on the T4s which are i7 there is no such thing as bitband...

So in some parts of some subsystems, the IMXRT added multiple logical registers, they have one that; does the whole register, they have another one SET which will atomically turn on any bits in the register whose value you passed in as a 1, likewise a clear which clears any bits that you pass in a 1 for... And believe most of them also have a toggle.

Example for this is in GPIO the Data register (DR), also has DR_SET, DR_CLEAR, DR_TOGGLE...

Unfortunately the LPUART CTRL is not setup with these...

 

[joepasquariello]

The Hardware serial ports are different.

Thanks for the great info. I'm not surprised there are lots of nitty-gritty details that make this challenging.

FYI, a quick look at the MCUEspresso SDK shows this in the non-blocking write function, the same as in T4 now, though it is only done once for a multi-byte write.

  // Disable and re-enable the global interrupt to protect the interrupt enable register during read-modify-wrte.
  uint32_t irqMask = DisableGlobalIRQ();
  // Enable transmitter interrupt
  base->CTRL |= (uint32_t)LPUART_CTRL_TIE_MASK;
  EnableGlobalIRQ(irqMask);