I'm working on an audio project, and I want to get the most I can from the CPU. What I am worried about is how to better optimize my GPIO/I2C to reduce CPU overhead. I have 2 problems...
1: I'm using 7 i2c hall sensors with no useful way to change address, so my initial solution was to use 1 clock and 7 data lines and bit-bang it.
2: I have a 7x12 switch matrix which I need to poll everything at >2khz to get key velocity info. Basically drive one the 7 pins low, and read the other 12, cycle. I can do this with a timer interrupt for now.
The real question I have is if Teensy4/4.1 has a way for the hardware to "automate" these sorts of tasks, avoiding the CPU penalties of high frequency interrupts.
1: I'm using 7 i2c hall sensors with no useful way to change address, so my initial solution was to use 1 clock and 7 data lines and bit-bang it.
2: I have a 7x12 switch matrix which I need to poll everything at >2khz to get key velocity info. Basically drive one the 7 pins low, and read the other 12, cycle. I can do this with a timer interrupt for now.
The real question I have is if Teensy4/4.1 has a way for the hardware to "automate" these sorts of tasks, avoiding the CPU penalties of high frequency interrupts.