Per my post above, I experimented with enabling the edge count/compare capability for the FlexPWM timers in FreqMeasureMultiIMXRT.cpp, and I got it to work. I'm sure this feature can be folded into the library, but for now I just modified the configuration directly. In the code below from begin(), I added 3 lines for each of the 3 channels X,A,B. They set the edge compare value to 200 (which must be counting both edges because the result is frequency/100), and set two additional flags to enable the feature. The result is good measurement on 3 channels up to at least 10 MHz. The result is not always exact, but I think that's due to inaccuracy in the PWM output frequency for test. As you go higher in frequency you may need to reduce the counter's clock frequency to avoid overflow.
This is the output of the FreqMeasureMulti 3-channel example program with modifications for channel numbers and using 8-bit PWM resolution. The value of 100,000 represents 10,000,000 divided by 100. I get exact results for 12.5 MHz with 8-bit PWM and 25 MHz with 4-bit PWM.
FreqMeasureMulti Begin
1760.79, 1756.38, 1747.64
100000.00, 100000.00, 100000.00
100000.00, 100000.00, 100000.00
100000.00, 100000.00, 100000.00
I'll work on updating the library to support this configuration and include the divider in the frequency calculation, but this at least gives you a way to move forward.
Note that you must also make the fix to read capture registers CVAL0-5 per my post above. Without that fix, it doesn't work at all at high frequencies.
switch (_channel) {
case 0: // X channel
pflexpwm->SM[sub_module].CAPTCTRLX = capture_mode | FLEXPWM_SMCAPTCTRLA_ARMA;
pflexpwm->SM[sub_module].INTEN |= (inten & (FLEXPWM_SMINTEN_CX0IE | FLEXPWM_SMINTEN_CX1IE)) | FLEXPWM_SMINTEN_RIE;
// set capture compare to 200 edges and enable by setting two flags
pflexpwm->SM[sub_module].CAPTCOMPX = FLEXPWM_SMCAPTCOMPX_EDGCMPX(200);
pflexpwm->SM[sub_module].CAPTCTRLX |= FLEXPWM_SMCAPTCTRLX_INP_SELX;
pflexpwm->SM[sub_module].CAPTCTRLX |= FLEXPWM_SMCAPTCTRLX_EDGCNTX_EN;
break;
case 1: // A Channel
pflexpwm->SM[sub_module].CAPTCTRLA = capture_mode | FLEXPWM_SMCAPTCTRLA_ARMA;
pflexpwm->SM[sub_module].INTEN |= (inten & (FLEXPWM_SMINTEN_CA0IE | FLEXPWM_SMINTEN_CA1IE)) | FLEXPWM_SMINTEN_RIE;
// set capture compare to 200 edges and enable by setting two flags
pflexpwm->SM[sub_module].CAPTCOMPA = FLEXPWM_SMCAPTCOMPA_EDGCMPA(200);
pflexpwm->SM[sub_module].CAPTCTRLA |= FLEXPWM_SMCAPTCTRLA_INP_SELA;
pflexpwm->SM[sub_module].CAPTCTRLA |= FLEXPWM_SMCAPTCTRLA_EDGCNTA_EN;
break;
case 2: // B Channel;
pflexpwm->SM[sub_module].CAPTCTRLB = capture_mode | FLEXPWM_SMCAPTCTRLA_ARMA;
pflexpwm->SM[sub_module].INTEN |= (inten & (FLEXPWM_SMINTEN_CB0IE | FLEXPWM_SMINTEN_CB1IE)) | FLEXPWM_SMINTEN_RIE;
// set capture compare to 200 edges and enable by setting two flags
pflexpwm->SM[sub_module].CAPTCOMPB = FLEXPWM_SMCAPTCOMPB_EDGCMPB(200);
pflexpwm->SM[sub_module].CAPTCTRLB |= FLEXPWM_SMCAPTCTRLB_INP_SELB;
pflexpwm->SM[sub_module].CAPTCTRLB |= FLEXPWM_SMCAPTCTRLB_EDGCNTB_EN;
break;
}