Suitable op amp for driving the teensy4 ADC

frankzappa

Well-known member
Hello!

I just saw this document: https://www.eetimes.com/using-op-amps-with-data-converters-part-1/#

Part 2: https://www.eetimes.com/using-op-amps-with-data-converters-part-2/

Part 3: https://www.eetimes.com/using-op-amps-with-data-converters-part-3/

There are multiple parts in this series and it basically says that buffering op amps must be matched to the ADC or they may not perform properly.
Most often you have to test which op amps work best with a given ADC in your specific application. Also the ADC manufacturer often has recommended op amps.

Are there such op amp recommendations from the manufacturer of the teensy4 adc?

I have tested the Texas Instruments TLC2264 which seems to work fine on my PCB and the Microchip MCP6004 only on a breadboard. I have a PCB coming in with the MCP6004 so will be able to compare them. Breadboards are much noisier.

Maybe people on this forum has tested some op amps and can give recommendations?

The most obvious requirement for a data converter buffer amplifier is that it not degrade the dc or ac performance of the converter. One might assume that a careful reading of the op amp datasheets would assist in the selection process: simply lay the data converter and the op amp datasheets side by side, and compare each critical performance specification. It is true that this method will provide some degree of success; however, in order to perform an accurate comparison, the op amp must be specified under the exact operating conditions required by the data converter application. Such factors as gain, gain setting resistor values, source impedance, output load, input and output signal amplitude, input and output common-mode (CM) level, power supply voltage, and so forth, all affect op amp performance.

It is highly unlikely that even a well written op amp data sheet will provide an exact match to the operating conditions required in the data converter application. Extrapolation of specified performance to fit the exact operating conditions can give erroneous results. Also, the op amp may be subjected to transient currents from the data converter, and the corresponding effects on op amp performance are rarely found on datasheets.

Converter datasheets themselves can be a good source for recommended op amps and other application circuits. However this information can become obsolete as newer op amps are introduced after the converter's initial release.

Analog Devices and other op amp manufacturers today have on-line websites featuring parametric search engines, which facilitate part selection (see Reference 1). For instance, the first search might be for minimum power supply voltage, e.g., 3 V. The next search might be for bandwidth, and further searches on relevant specifications will narrow the selection of op amps even further. Figure 3-4 summarizes the selection process.

The amplifier should not degrade the performance of the ADC/DAC
Ac specifications are usually the most important
– Noise
– Bandwidth
– Distortion
Selection based on op amp data sheet specifications difficult due to varying conditions in actual application circuit with ADC/DAC:
– Power supply voltage
– Signal range (differential and common-mode)
– Loading (static and dynamic)
– Gain
Parametric search engines may be useful
ADC/DAC data sheets often recommend op amps (but may not include newly released products)
 
Well for the T4 you'd be looking for a true rail-to-rail input & output opamp capable of running at 3.3V supply,
so that it can't damage the T4. Other than that nothing special for a low resolution ADC. If you were
looking for an opamp to drive a fast 16 bit precision ADC that would be another matter, ENOB, settling
time, DC precision, linearity etc would all be more critical.

The purpose of driving an ADC with an opamp is to provide low impedance signals to it - this is also
an issue for the reference voltage. For high speed data acquisition this all gets much more critical,
reading what are essentially DC signals is less problematic.
 
Well for the T4 you'd be looking for a true rail-to-rail input & output opamp capable of running at 3.3V supply,
so that it can't damage the T4. Other than that nothing special for a low resolution ADC. If you were
looking for an opamp to drive a fast 16 bit precision ADC that would be another matter, ENOB, settling
time, DC precision, linearity etc would all be more critical.

The purpose of driving an ADC with an opamp is to provide low impedance signals to it - this is also
an issue for the reference voltage. For high speed data acquisition this all gets much more critical,
reading what are essentially DC signals is less problematic.

Maybe I'm missing something here but say I'm sampling 10 sensors at 50kHz each at 12bit. Every sample is averaged 4 times so it's actually 200kHz per sensor. 10 sensors with two adc's means each ADC has to take a snaphot one million times per second. That's a lot of switching inside the adc and multiplexer. It causes a kickback as far as I have read and you have to isolate the op amp from this effect by adding a small high quality capacitor about 20 times bigger than the capacitor in the ADC. To keep the op amp stable from this capacitive load you add a small resistor. Further more the op amp must have a settle time faster than each aquisition time which to me seems very fast unless I'm misunderastanding how this works.

Here is an explanation: https://www.youtube.com/watch?v=y5phD6HRuno&t=42s

I've been looking at the OPA4991: https://www.ti.com/lit/ds/symlink/opa4991.pdf?ts=1623456384174 which seems like it would be suitable for this.

Maybe it will make no difference like you say but I'm willing to test it for science. Maybe we can find something that improves the performance of the teensy4 adc.

Any help on finding the spec sheet data to plug into the equations to work with this op amp is very welcome.
 
Last edited:
Every sample is averaged 4 times

This is of dubious utility.

Sampling a signal four times in quick succession might help if it were the ADC that was the problem. If you have a proper pre-sample filter in place then the only variation you should see in these samples is from ADC performance.
 
This is of dubious utility.

Sampling a signal four times in quick succession might help if it were the ADC that was the problem. If you have a proper pre-sample filter in place then the only variation you should see in these samples is from ADC performance.

I'm not sure if you or I am misunderstanding. Sampling multiple times is what the averaging setting in the ADC does, does it not? You can choose 2, 4, 8 or 16 averages I think. It is the most effective way to get cleaner signals so it definitely works.

The proper pre sample filter is what I'm trying to design here. The resistor and capacitor values seem very important.
 
You are sampling at 50KHz so have some sort of filter with a corner frequency of less than 25KHz. The average setting causes the ADC to perform 4 conversions just as fast as it can. The samples are not evenly spaced in time like the 50KHz output but grouped at a single instant. (This can cause trouble for simple RC filters.)

The presample filter should have an output that is essentially constant over this 4 sample interval.

If the ADC is really that bad, then it will help. Otherwise, it does nothing.

You would be better served sampling at 200KHz and running the data through a digital filter. With the advantage of requiring a less aggressive presample filter to keep Nyquist happy.
 
The resistor and capacitor values seem very important.

I can confirm, a few times I've seen a strange effect where the ADC plays havoc with an opamp's output. It's on my long list of things I'd like to explore and write up nice documentation. Odds of that happening anytime soon seem pretty slim.

My best guess on this phenomenon is some combination of the opamp doesn't like driving a capacitive load (phase shift reduces feeback loop stability) and the rapid switching nature of the ADC input tends to forcibly change the opamp's output voltage, which it's already struggling to keep stable. Unfortunately, we don't really get specs or a model of the ADC's input impedance under these rapid transient changes. Nor do opamps come with detailed enough info to predict how their feedback loops will respond. It's also possible my guesswork could be off, and the real reasons behind these strange problems could have some other explanation.

In any case, with experimentation, I've usually found a resistor of 220 ohm to 1K between the opamp output and ADC input works wonders.

A ceramic or plastic film capacitor close the ADC input usually helps, with or without the opamp+resistor. But of course you never want to put a capacitor directly on an opamp's output, as all opamps hate driving capacitors! The resistor is definitely needed between the opamp and ADC pin to add a capacitor. The resistor and capacitor forms a low-pass filter, so you don't want to go crazy with a large value capacitance.

If seems all very imprecise and filled with guesswork and hand waving, well, that's the reason I've not made any documentation about it on the website...
 
Over-sample and average whenever you have time to do so.

> all opamps hate driving capacitors!

But then there are op amps like the AD826 - stable with unlimited output capacitance.

With others (eg, MCP6271), a 1K resistor will make it stable with any capacitance. And is fine in terms of ADC performance.
 
Over-sample and average whenever you have time to do so.

> all opamps hate driving capacitors!

But then there are op amps like the AD826 - stable with unlimited output capacitance.

With others (eg, MCP6271), a 1K resistor will make it stable with any capacitance. And is fine in terms of ADC performance.

Of course, I oversample and use a software filter but it seems that averaging on the ADC settings gives better results compared to oversampling and filtering in software. This seems to me that there might be some op amp settling time issues or similar.

I think a faster settling op amp than the ones I’m using would be better along with the small capcitor and resistor before the adc to deal with the kickback effect from the adc. If you look at the youtube video I linked above you will see what I mean.
 
Last edited:
I can confirm, a few times I've seen a strange effect where the ADC plays havoc with an opamp's output. It's on my long list of things I'd like to explore and write up nice documentation. Odds of that happening anytime soon seem pretty slim.

My best guess on this phenomenon is some combination of the opamp doesn't like driving a capacitive load (phase shift reduces feeback loop stability) and the rapid switching nature of the ADC input tends to forcibly change the opamp's output voltage, which it's already struggling to keep stable. Unfortunately, we don't really get specs or a model of the ADC's input impedance under these rapid transient changes. Nor do opamps come with detailed enough info to predict how their feedback loops will respond. It's also possible my guesswork could be off, and the real reasons behind these strange problems could have some other explanation.

In any case, with experimentation, I've usually found a resistor of 220 ohm to 1K between the opamp output and ADC input works wonders.

A ceramic or plastic film capacitor close the ADC input usually helps, with or without the opamp+resistor. But of course you never want to put a capacitor directly on an opamp's output, as all opamps hate driving capacitors! The resistor is definitely needed between the opamp and ADC pin to add a capacitor. The resistor and capacitor forms a low-pass filter, so you don't want to go crazy with a large value capacitance.

If seems all very imprecise and filled with guesswork and hand waving, well, that's the reason I've not made any documentation about it on the website...

You are talking about the exact thing that the youtube link above shows. They show how to calculate these things. Only problem is knowing what values to put in from the op amp and adc datasheets. They also show how to simulate it in spice.

It seems a small resistor 50-700 ohm and small high quality capacitor (mica or np0) about 20 times the size of the one in the ADC so 30-40pF is what is needed along with an op amp suitable for driving sar adc’s. I’m going to try the opa4991 and see how it works.

Note that this is not for filtering, the capacitor attenuates the kickback effect from the ADC and the resistor keeps the op amp stable from the capacitive load. Choosing the wrong values for these two may cause overshoot or cause the ADC capacitor not to charge up in time.

You can use this tool to simulate some op amp and adc models and see how changing the values effects things: https://m.youtube.com/watch?v=hoW1SlQmrNE

Op amp is not a problem but the ADC is a bit harder because it seems it’s not specified what manufacturer/model it is.
 
There is some driving circuitry suggested for the AD8885 ADC (high speed SAR 18 bit) in its datasheet,
using an OPA350 opamps and 10 ohm resistors:
https://www.ti.com/lit/ds/symlink/ads8885.pdf

It also has some suggestions for low impedance drive to the reference input too.

I'll take a look at it although I'm not sure it's going to apply.

What I really want to find out is the acquisition time of the teensy adc (how long it charges the internal capacitor) and the size of the capacitor inside the ADC. I thought that it was 2pF but that is the input capacitance. I'm not seeing this info in the datasheet.
 
Given the maximum input resistance of approximately 7kΩ and input
capacitance of approximately 1.3 pF, sampling to within 1/4LSB (at 12-bit resolution)
can be achieved within the nominal sample window (6 cycles @ 40 MHz maximum
ADCK frequency) provided the resistance of the external analog source (RAS) is kept
below 4 kΩ.

Hence my suggestion to use 1K in series and not worry about it. Do calculate a capacitor value to provide a proper anti-aliasing filter.
 
Hence my suggestion to use 1K in series and not worry about it. Do calculate a capacitor value to provide a proper anti-aliasing filter.

Would that antialiasing filter be below half the frequency of the sample rate for each sensor or the sample rate of each ADC? Half of 50kHz or 250kHz?

Or would that also include the averaging for example with 4 averages that would be half of 200kHz or 1mHz?
 
lowest sample rate involved - each sampling spawns repeated copies of the spectrum above its Nyquist, you
want to ignore all of these!

However only the ADC sampling stage requires a hardware filter - here a 25kHz brick wall digital filter could
be applied after ADC to handle the sensor's 50kSPS rate. (Typically you'd go for say a 15kHz digital filter with
less stringent requirements - brick wall filters need 100's or 1000's of FIR terms!)
 
lowest sample rate involved - each sampling spawns repeated copies of the spectrum above its Nyquist, you
want to ignore all of these!

However only the ADC sampling stage requires a hardware filter - here a 25kHz brick wall digital filter could
be applied after ADC to handle the sensor's 50kSPS rate. (Typically you'd go for say a 15kHz digital filter with
less stringent requirements - brick wall filters need 100's or 1000's of FIR terms!)

I’ve already tested an RC filter. I’m not sure if it’s making any difference or if it’s worse. I see no point to be honest.

Software filtering makes a huge impact indeed.
 
The important big picture principle is that it's much easier to address noise if you know the frequency and where it's coming from. Guessing leads to lots of "do this" and "it didn't help".

For pre-ADC analog filtering, often you have to ignore nyquist/aliasing and think "how much filtering can I apply before my signal is excessively modified?".
 
The important big picture principle is that it's much easier to address noise if you know the frequency and where it's coming from. Guessing leads to lots of "do this" and "it didn't help".

For pre-ADC analog filtering, often you have to ignore nyquist/aliasing and think "how much filtering can I apply before my signal is excessively modified?".

I’ve done exactly that. I’ve pretty much sweeped the filter from 2k to 500k. What improves things drastically is filtering in software using floats and doubles. RC filter seems a waste of board space.

This tells me I don’t have much noise in my circuit. The noise is from the adc it self.

The reason for this thread is trying to see if there is any value in a proper adc driver circuit.

It seems noone has actually tried it. I wouldlike to try it but noone seems to know the capacitance of the charging capacitor in the adc or the acquisition time. The spec sheet says 2pF input capacitance, is that it? I think the acquisition time is 150ns. The spec sheet is very difficult to understand.

Also I’m getting pretty good signals already but the perfectionist in me always wants more.
 
Last edited:
It seems noone has actually tried it. I wouldlike to try it but noone seems to know the capacitance of the charging capacitor in the adc or the acquisition time. The spec sheet says 2pF input capacitance, is that it? I think the acquisition time is 150ns. The spec sheet is very difficult to understand.
I didn't have any trouble. Figure 35 shows a simplified version of the input circuitry including CADIN which is the sampling capacitor with a typical value of 1.5pF. Figure 36 shows the minimum sampling time vs. Ras. (External source resistance.) Sampling time depends on the ADC clock and the number of cycles selected for sampling. Which is up to you. Or whoever wrote the library if that is the way you go.
 
I didn't have any trouble. Figure 35 shows a simplified version of the input circuitry including CADIN which is the sampling capacitor with a typical value of 1.5pF. Figure 36 shows the minimum sampling time vs. Ras. (External source resistance.) Sampling time depends on the ADC clock and the number of cycles selected for sampling. Which is up to you. Or whoever wrote the library if that is the way you go.

Thanks for clearing this up.
So Cas is the external circuit capacitance and is not part of the adc circuit?

For some reason I didn’t see Cadin, would have been much easier.

I guess I will have to ask for the acquisition time in the ADC library thread. I’m using high speed on both settings. I’m guessing it’s 150ns as it’s the fastest time in figure 36.

Edit: I just realised that the datasheet is showing this exact thing I’m discussing discussing. Figures 36, 37 and 38. It shows the minimum sample acquisition time vs the input resistance and input capacitance.

However this only shows 2pF, 5pF and 10pF and the exact values can’t be read.

So the 1kOhm input ”limit” is basically only if you are using a capacitor of less than 2pF for your RC circuit if you are running the adc at full speed.
 
Last edited:
Sorry, I know it is old, can't help chiming in. SAR type ADC's have kickback. There are application notes and tutorials on driving ADCs, it should be there.
 
Last edited:
Back
Top