Integrating MPU 6050 - power conditioning and pull-ups

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kdharbert

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I need to integrate MPU 6050 units on a custom PCB. I am working backward from github EagleCAD files. I am going to run the unit tightly coupled with a Teensy 4.0 and I need to iron out exactly what components can be removed.

I'm not using the Stemma connectors, so those can be removed.
Teensy will provides 3v3, so the regulator and supporting components can be removed.
Teensy already has pullup resistors, so I think those to can be removed.
Teensy's logic level is already 3.3v so I think the BSS138 level shifters can be removed.

This seems to leave just the MPU 6050 unit and some capacitors. Is this sound reasoning?

Schematic file:
https://cdn-learn.adafruit.com/assets/assets/000/083/292/original/sensors_schematic.png?1572469262
 
I'm working off of EagleCAD files from an Adufruit breakout and they're basically the same as the doc. The pull-ups on the breakout design are behind level shifters. Since I'm going to use Teensy's 3.3v regulator and 3.3v logic, the level shifters are not needed. This leaves just the 10k pull-up resistors. Teensys already have pull-up resistors...so this design will simply add another 10k resistor in parallel. I'm not sure if this is the right thing to do.
 
I'm working off of EagleCAD files from an Adufruit breakout and they're basically the same as the doc. The pull-ups on the breakout design are behind level shifters. Since I'm going to use Teensy's 3.3v regulator and 3.3v logic, the level shifters are not needed. This leaves just the 10k pull-up resistors. Teensys already have pull-up resistors...so this design will simply add another 10k resistor in parallel. I'm not sure if this is the right thing to do.

If you're using I2C, I would recommend 2.2k pullups on SDA and SCL (pulling up to 3.3V). If you're using SPI, I would recommend not using pullups. If you have multiple SPI devices on the bus, you might want a 10k pullup on the CS pins of each device, but you can also be careful and just use digitalWriteFast in software to pullup all the CS pins in lieu of the hardware 10k pullups on CS.
 
I'm using I2C on a Teensy4, with two MPU 6050s on each bus. In that config, the recommendation is only a single 2.2k pullup on both SDA and SCL?
 
Its wise never to let clocks or chip-select lines float - otherwise the chip might randomly configure after power up and
before the microcontroller has set its output pins as outputs. Hardware pullup on chip selects, pull-downs (usually)
for clocks. 10k is fine, 100k is probably fine too. However check the MPU6050 datasheet - it may already have internal
pull resistors on the SPI pins (some chips do, some don't).

I2C usually employs 4k7 or 10k pullups unless there's a reason for a stiffer one (like off-board bus cabling, or special
ultra-fast modes). 4k7 is the commonest value you'll see and will handle a reasonable size of bus.

Built in pullups may be too weak for I2C - check the datasheet.
 
4k7 is common with 5V systems, 2k2 with 3.3V.

Yes, one 2k2 on SDA and one on SCL pulled up to 3.3V. Only one set of pullups is needed per bus.
 
The time constant of I2C bus lines doesn't magically change with voltage, there is no reason for
the pullups to differ in value at 3.3V from 5V, the frequency of operation and total bus capacitance
are what determine the pullup value (plus the maximum 3mA constraint).
 
The time constant of I2C bus lines doesn't magically change with voltage, there is no reason for
the pullups to differ in value at 3.3V from 5V, the frequency of operation and total bus capacitance
are what determine the pullup value (plus the maximum 3mA constraint).

The rise time does not change with voltage, but would push towards using the smallest resistor value in order to let the data line rise logical high, especially at higher bus speeds and longer bus trace / wire lengths. The minimum resistor value does change with voltage however, since a low resistor value can prevent the line from being driven low.

TI has an application note on computing the maximum and minimum resistor values:
https://www.ti.com/lit/an/slva689/slva689.pdf

For a 5V VCC, I compute a minimum pullup resistance of 1.5k Ohm and for a 3.3V VCC, I compute a minimum pullup of 966 Ohm.

Notice from Figure 3 the maximum pullup values for Fast mode, which the MPU6050 supports. To support fast mode with 4.7k pullups requires a bus capacitance under about 70pF whereas a 2.2k pullup enables a capacitance around 140 pF. So the lower pullup resistor value leaves a lot more headroom for long trace / wire lengths and bus capacitance while supporting I2C fast mode.

That's why you see rules of thumb of 4.7k pullups for 5V VCC and 2.2k for 3.3V VCC - you can meet the minimum I2C resistance values while improving headroom for less than ideal bus setups and higher bus speeds.
 
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