psram cs

[koendv]

Hi. A question.
The esp-psram64 datasheet says about power-up:

From the beginning of power ramp to the end of the 150-μs period, CLK should remain low, CE# should remain high (to track Vcc within 200 mV) and SI/SO/SIO[3:0] should remain low.

If I look at e.g. ESP32-WROVER schematics, this is done with a 10k pull-up to 3.3V on the psram CS pin.
If I look at the teensy 4.1 schematic, the esp-psram64 CS pin is connected to a processor pin only. No pull-up.
So I'm wondering what happens on the teensy psram CS pin during power-up.

regards,

 

[Frank B]

Well, the PSRAM works very well, so this question is quite academical.
It would also need clock cycles and commands to have any influence, I think.

 

[defragster]

1 or 2 PSRAM chips work very well indeed as configured. Probably more utilized in testing and development than SD card and Ethernet chip and some other things.

Between LittleFS media usage, and display adapters using it for buffers and direct memory use for storage ... those PSRAM chips were active early in the T_4.1 Beta testing and that note on startup does not seem to affect usage.

Those pins are direct connect to the processor to allow use as normal I/O when not used as QSPI. They are not dedicated like on the WROVER type devices.

{local install}\hardware\teensy\avr\cores\teensy4\startup.c has some manipulation to :: // look for the first PSRAM chip
Then it sets external_psram_size to 0, 8, or 16 based on the chip response.

 

[koendv]

Those pins are direct connect to the processor to allow use as normal I/O when not used as QSPI. They are not dedicated like on the WROVER type devices.
{local install}\hardware\teensy\avr\cores\teensy4\startup.c has some manipulation to :: // look for the first PSRAM chip
Then it sets external_psram_size to 0, 8, or 16 based on the chip response.

In startup.c, in void configure_external_ram(), there's this line:

IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_24 = 0x1B0F9; // 100K pullup, strong drive, max speed, hyst

If I understand correctly, what happens is that first the 3.3V power ramps up, but the psram CS is kept floating.
Then on the processor side the software configures the CS pin as pull-up, and it's at this moment that CS goes high and the psram initializes.
So the pull-up resistor is there, but on teensy it's inside the mcu.
ok. That clears it up for me.

 

[Frank B]

Its also quite possible that it has a weak pullup inbuilt.