GPT1 / GPT2: Count from external pin @300MHz?

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reference manual (52.3.1) says "To ensure proper operations of GPT, the external clock input frequency should be less than 1/4 of frequency of the peripheral clock (ipg_clk)", so max is 150mhz/4 = 37.5 MHz. Though in practice, I think i've got GPT to count correctly up to 75 MHz (68 MHz for externally generated signal). Here is post on Teensy 3 counting up to 132 MHz using LPTMR and short jumpers.
 
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The internal clock speed of a processor is often higher than the speed the GPIO pads are clocked, since those aren't in the
low voltage core of the chip which has the fastest speed. This is why LVDS signalling is used for really fast interfacing to a chip
as it can go straight to the core and is a transmission line (tuning out the pesky BW-limiting capacitance).

This is basically just like the old days when ECL divide-by-ten chips were used to prescale in counters to a speed compatible
with TTL. There were divide-by-10/11 chips for use in PLLs to allow more flexible divide ratios by guile and cunning.

Another thing to consider is that up at speeds like 300MHz you need to use transmission lines, either 50, 75ohm coax or 110
ohm twisted pair - which means that unless you use low-voltage signalling the power consumption is very high. This means
it typically requires a comparator or line-receiver to detect the low voltage signals used (which might be 1mW or so, meaning a few 100mV).
 
Another thing to consider is that up at speeds like 300MHz you need to use transmission lines, either 50, 75ohm coax or 110
ohm twisted pair - which means that unless you use low-voltage signalling the power consumption is very high. This means
it typically requires a comparator or line-receiver to detect the low voltage signals used (which might be 1mW or so, meaning a few 100mV).

Right. For that topic there are SN65LVDS1 and SN65LVDS2.
 
;290068 said:
reference manual (52.3.1) says "To ensure proper operations of GPT, the external clock input frequency should be less than 1/4 of frequency of the peripheral clock (ipg_clk)", so max is 150mhz/4 = 37.5 MHz. Though in practice, I think i've got GPT to count correctly up to 75 MHz (68 MHz for externally generated signal). Here is post on Teensy 3 counting up to 132 MHz


The 60-70 MHz are disappointing. Also because it's the fastest MCU on the market.

How does he manage to measure 132 MHz? Is the measurement reliable?
https://forum.pjrc.com/threads/54711-Teensy-4-0-First-Beta-Test?p=212014&viewfull=1#post212014.
 
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