However, the branch prediction seems not to work here? 600 / 3 should be 200MHz. Hm....
And, if you take the prerequisites into account, it's a little more than one cycle
- ok, on both.
Code:
6a: f04f 4284 mov.w r2, #1107296256 ; 0x42000000
6e: 2308 movs r3, #8
Eh, no, all is good I think.
The first store needs 2 cycles, the second one If I remember correctly.
BUT I don't remember who stated it's one cycle? It's not the case for the 3.x, too, then... so that was a wrong Info. It's only true in a sepcial sequence. If the instruction before is a "str", too. So, who said this? It's wrong in most cases. Almost all. Must be *many* years ago..
MoNoImPoSm , sorry. SOmeone must have not written the whole truth. I all the years thought it was true, "one cycle". But.. it's true only for a *very* special case. Did not think about it, all the years.
Over all, it's just wrong.
In almost all "normal" cases (=no extremly tight loop, no consecutive digitalWriteFast) a single digitalWriteFast takes 3 or 4 cycles.