Forum Rule: Always post complete source code & details to reproduce any issue!
-
Junior Member
Simple WORKING JTAG+UART for Teensy 4.1
Below is my simple mod to add JTAG with UART to Teensy 4.1.
Tools needed:
Small screwdriver, small solder tip, small knife, optical magnification, Isopropanol and good flux.


YOU ONLY NEED TO MOD PIN 5-8 and pin 13!
I have just played around with the Cortex M0 chip to understand how things work.

A RT1010-EVK flashed with Segger JTAG firmware.

The vias for pin 5-8 are easily accessible for the MKL02 chip.
Rub off the solder mask on the vias with a small screwdriver and Isopropanol. Flux the free copper, and add solder to (the top-side of) the vias. Make 2 parallel cuts with a sharp knife between the pads and the via. DO NOT CUT DEEP! Peel off the copper between the cuts for pin 5-8. Solder four thin wires to the four vias. You now have the JTAG connection. I made a JTAG-header above the USB connector.
If you want to use the NXP specific JTAG, you need to cut the copper from pin 13 - JTAG_MOD, and ground (on the RT1062 side) it to the G pin instead.
Teensy will still boot from Flash, if no JTAG is connected.
I my case, I have a custom board connected to Teensy, so I redirected PRINTF to UART7, and connected that pin to the UART pin of my "Segger" JTAG thing.
I can now debug my Teensy in MCUXpresso, and Hello world prints to the terminal in MCUXpresso.

If it's your first time doing HW hack like this, train on some other (broken) PCB first. Any old computer PCB, should be good for training.
Last edited by lilltroll77; 03-09-2022 at 09:49 PM.
-
Junior Member
Visual Studio Code
I verified that JTAG worked in VSC & platformIO, meaning I can use the Teensy Arduino framework with JTAG.
A working platformio.ini shown below (for Segger JLINK)
Code:
[env:teensy41]
platform = teensy
board = teensy41
framework = arduino
debug_tool = jlink
debug_port = :2331
; JTAG interface
debug_server =
{FULL PATH HERE}.platformio\packages\tool-jlink\JLinkGDBServerCL.exe
-singlerun
-if
JTAG
-select
USB
-port
2331
-device
MIMXRT1062xxx6A
-speed
4000
upload_protocol = jlink-jtag
-
Nice work! Glad to see someone else take on the challenge, it sure is satisfying when you get it working. My setup is VSCode issuing commands to Arduino_debug.exe to build and JLink.exe to upload.
Just a warning for anyone attempting this. I'm not sure if the new bootloader firmware has made it's way on to the new teensy 4s yet but there is a chance of the Teensy not booting up when you cut off the JTAG lines from the bootloader chip. You may see the led blink twice repeatedly meaning no JTAG connection, I believe it was preventing the CPU from being powered up in my case. This caused me to replace the MKL02.
-
Junior Member
Thanks for the warning regarding MKL02!
I made 2 versions, one larger mod with 2 external delay-reset circuits, where the MKL02 was removed, but since my MKL02 worked without issues, I cont. to work with the simple mod.
-
Junior Member
Vias
Can also explain the reason I solder on vias, instead of tracks/pads:
In my experience, vias can take more force and heat than pads. I have ripped off many pads in my days doing mods, but since I started to add small wires to vias instead of pads, the soldered wire will pull loose before the vias are torn. Also, the vias will not disconnect from the FR4, like a pad, due to the heat from the soldering iron.
I have not so far ripped any vias apart.
-
Hi, I would like to wire up a Jtag interface as you have shown here but seem to be missing some information. Do you have a schematic diagram of the connections? I see several additional wires on the CPU, but it's not entirely clear what those are. Also, what are the pin connections on the Jtag connector? Which wire goes where?
Thanks for your post.
Louis
-
Junior Member
Check out this thread
https://forum.pjrc.com/threads/66180...l=1#post297060
or (from MCUXpresso)

together with the schematic provided by PJRC.
Teensy 4.1 Development Board
I did have an ugly schematic in paint, but we had a power loss before it was saved to disk.
You only need to mod pin (5-8) & 13. My extra wires are just for reconnecting the MCU since I cut more than just the JTAG pins.
-
Junior Member
Remade my paint schematic

To be sure, how to connect TDI and TDO, connect GND, VDD, TMS, and TCK first, then check which pin is sending data from the JTAG adapter, and from the MXRT1062. Connect the sending pin of the JTAG-adapter with the MXRT1062 reciever (not sending pin), and vice versa.
-
Thanks for your quick reply. This info is all I needed. I am looking forward to having a better debug tool using this.
I will post a note on how that goes when I get it up and going.
Thanks again. It's most appreciated.
Louis
-
Junior Member
JTAG in flash boot mode
Spencez, when I use JTAG, I need to press the program button first for J-Link Commander to connect, otherwise i get a
"Invalid implemeter code read from CPUIDVal[31:24] = 0xFF" error
Do you have the same issue, and if so, have you figured out why?
EDIT: Ohh google knows. Do not use __WFI(); (wait for interupt) in your code together with J-Link in JTAG mode. J-link will not find your device in wait mode.
Last edited by lilltroll77; 03-20-2022 at 06:39 PM.
-
Junior Member
Serial Wire Debug
It is possible to switch to SWD again by writing
OCOTP->CFG5 = 0x18 in your C code;
That is BootConfig5 shadow register, where bit 19 sets SWD or JTAG.
or if you want to do it in J-Link commander over JTAG, you can run this (Enable_SWO.jlink) commander script
Device MIMXRT1062XXX6A
SelectInterface JTAG
Speed 4000
JTAGConf -1,-1
connect
write4 0x401f4460 0x18
SelectInterface SWD
You can run the script like this in Windows
:> "J-Link Commander V7.62a.lnk" -CommanderScript C:\tmp\Enable_SWO.jlink
Connecting to target via SWD
InitTarget() start
InitTarget() end
Found SW-DP with ID 0x0BD11477
DPv0 detected
CoreSight SoC-400 or earlier
AP map detection skipped. Manually configured AP map found.
AP[0]: AHB-AP (IDR: Not set)
AP[0]: Core found
AP[0]: AHB-AP ROM base: 0xE00FD000
CPUID register: 0x411FC271. Implementer code: 0x41 (ARM)
Found Cortex-M7 r1p1, Little endian.
FPUnit: 8 code (BP) slots and 0 literal slots
CoreSight components:
ROMTbl[0] @ E00FD000
[0][0]: E00FE000 CID B105100D PID 000BB4C8 ROM Table
ROMTbl[1] @ E00FE000
[1][0]: E00FF000 CID B105100D PID 000BB4C7 ROM Table
ROMTbl[2] @ E00FF000
[2][0]: E000E000 CID B105E00D PID 000BB00C SCS-M7
[2][1]: E0001000 CID B105E00D PID 000BB002 DWT
[2][2]: E0002000 CID B105E00D PID 000BB00E FPB-M7
[2][3]: E0000000 CID B105E00D PID 000BB001 ITM
[1][1]: E0041000 CID B105900D PID 001BB975 ETM-M7
[1][2]: E0042000 CID B105900D PID 004BB906 CTI
[0][1]: E0040000 CID B105900D PID 000BB9A9 TPIU-M7
[0][2]: E0043000 CID B105F00D PID 001BB101 TSG
Cache: Separate I- and D-cache.
I-Cache L1: 32 KB, 512 Sets, 32 Bytes/Line, 2-Way
D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way
Cortex-M7 identified.
-
Junior Member
JTAG instrumentation - FreeMaster
Verifying that NXP FreeMaster works with Teensy 4.1

Example showing the live status of my blinking LED, and the angle position [deg] of a rotary encoder, that I'm turning.
Using JTAG instrumentation, no extra code is needed on the device. I seem to be able to access all peripheral + SRAM 
Makes peripheral debugging much easier, without any extra coding.
https://www.nxp.com/video/freemaster...FREEMASTER-VID
-
It is possible to switch to SWD again by writing
Hmm, but it's only possible when start with JTAG. As far as I know Paul did burn the flag to disable SWD, right? So it seemes to be inpossible to start with SWD after reset.
Last edited by jokn; 06-02-2022 at 09:40 AM.
-

Originally Posted by
lilltroll77
Remade my paint schematic
To be sure, how to connect TDI and TDO, connect GND, VDD, TMS, and TCK first, then check which pin is sending data from the JTAG adapter, and from the MXRT1062. Connect the sending pin of the JTAG-adapter with the MXRT1062 reciever (not sending pin), and vice versa.
According to this idea, maybe you can omit the separation to the MKL02. It would be worth a try to connect PTA1 to ground without any trace disconnection. As long as the MKL02 is held in reset, all ports are inputs. The same as for the EMC_01 pin on the RT1062 wich is an input per default. But I did not test that yet.
Another hint, the pin AD_B0_04 [F11] is the BOOT_MODE0 input which shoud be at GND to boot from Fuses, or rather not from serial.
Last edited by jokn; 06-02-2022 at 09:51 AM.
-

Originally Posted by
lilltroll77
Verifying that NXP FreeMaster works with Teensy 4.1
Thanks for the tip. I was not aware of this software, it works great!
-
Thanks for the great job done. I am trying to replicate what you did here on a Teensy 4.1 with MIMXRT1062xxxxB onboard. I did the modification and I am using a J-Link EDU mini: it connect fine wit J-Flash, but I cannot erase the device since the EDU is not licensed for J-Flash (I guess according the message error I got). Therfore I tried with MCU Xpresso, but even here I couldn't debug: "The error message says that the selected device is unkown to the Jlink software I am using (7.66b)> Anyone can help on this?
-
Resolved! I have had a conflict with two Segger J-link SW version installed. I confirm that I can program and debug even with my EDU mini Jlink.
Thanks
Posting Permissions
- You may not post new threads
- You may not post replies
- You may not post attachments
- You may not edit your posts
-
Forum Rules