RAM over SPI?

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Fnord

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Teensy seems like the perfect board for my project except for one thing: Not enough RAM to keep samples for fast access. The reference device I'm looking at has 64MB DDR266 dedicated for samples. I know there's no easy way to add more then 16MB of RAM but in another post here a developer was saying something along the lines of: There's always the possibility of adding "slow RAM" over SPI. What exactly does that mean and how slow is slow? I'm a beginner with teensy and I couldn't find more information about this yet.

What RAM can I use over SPI and can I add 64MB while still running a display (which I guess will also need SPI)? The more the better really. It's the one big problem with teensy so far. Thanks for your help.
 
Teensy seems like the perfect board for my project except for one thing: Not enough RAM to keep samples for fast access. The reference device I'm looking at has 64MB DDR266 dedicated for samples. I know there's no easy way to add more then 16MB of RAM but in another post here a developer was saying something along the lines of: There's always the possibility of adding "slow RAM" over SPI. What exactly does that mean and how slow is slow? I'm a beginner with teensy and I couldn't find more information about this yet.

What RAM can I use over SPI and can I add 64MB while still running a display (which I guess will also need SPI)? The more the better really. It's the one big problem with teensy so far. Thanks for your help.

The text below is from the Teensy 4.1 product page. So, for T4.1, you can add up to 16 MB of PSRAM. This is on a relatively fast QSPI (quad) bus, so it's pretty fast. I don't know the actual peak speed, but it won't be nearly as fast as DDR RAM on an external data bus. For Teensy other than T4.1, you would be limited to single data line SPI devices, which would be slower. There are a growing number of technologies for SPI RAM. If you google "SPI RAM". You'll find PSRAM, FRAM, which is non-volatile, SRAM, NVSRAM, etc.

QSPI Memory Expansion
Teensy 4.1 has 2 locations to add 8 pin QSPI memory chips. Both locations support 8MB PSRAM chips. If only 1 PSRAM chip is used, it must be solded to the smaller pads. The larger pads may be used with certain flash memory chips supported by the LittleFS library.
 
Thanks for the information. I'll be on T4.1. Since accessing samples would be literally the only task - and not more then eight of them at any given time - I assume technically I don't need a high bandwidth.

8 x 176.4 kB for stereo wav would be 1422 kB per second if I'm not mistaken. However, it depends how fast it can jump to new samples I guess.

Time to get acquainted with the libraries and see if any of the SPI RAMs are supported already. Since it might get complicated having the RAM spread out over SPI and QSPI I need to get 64 MB on SPI.

Trying to find 512 Mb SPI RAM right now... and I don't see anything, really.
 
Thanks for the information. I'll be on T4.1. Since accessing samples would be literally the only task - and not more then eight of them at any given time - I assume technically I don't need a high bandwidth.

8 x 176.4 kB for stereo wav would be 1422 kB per second if I'm not mistaken. However, it depends how fast it can jump to new samples I guess.

Time to get acquainted with the libraries and see if any of the SPI RAMs are supported already. Since it might get complicated having the RAM spread out over SPI and QSPI I need to get 64 MB on SPI.

Trying to find 512 Mb SPI RAM right now... and I don't see anything, really.

It would be quite expensive to get to 512 MB of serial RAM. Your data rate is not that high, so look at Flash, which is a lot cheaper. Also search this forum and elsewhere for Teensy-based synthesizers and other music devices. There are many, so I suspect you'll find a way.
 
64MB would be enough (512Mbit). More is always better but even finding 512Mb might be too hard to even find. No solution so far, I'd love to go with a teensy but seems like Raspberry is the only way here?
 
The reference device I'm looking at has 64MB DDR266 dedicated for samples.
Driving SDRAM like this requires a processor with a full address and data bus and an SDRAM interface - this takes perhaps 30+ pins to
interface and significant amounts of power to both drive the fast busses and the RAM chips. But you do get memory bandwidths
measured in GB/s - 266DDR pushes the databus at 533Mbit/s per bit line.

If you only need a few MB/s, the SPI approach is way simpler and easier. So "slow" in this context means SPI speeds (24Mbit/s?) or
quad SPI speeds rather than say 4GB/s for a full DIMM...
 
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