Does Teensy 3.6 have a "reference clock"?

[teensy3056]

Reading about all the clocks in the Teensy 3.6 leads me to believe that there is not a "reference clock" available for use in the microcontroller for use.

By "reference clock" I mean a clock which continuously writes to a register so that the program may refer to that register so as to have an accurate, real-time understanding of the passage of time, regardless of what else the microcontroller is doing, including peripheral interfacing and ISR usage.

I can find no Teensy 3.6 register which counts the "ticks" of any of the many clocks derived from the 16 MHz and 32.768 kHz crystals.

Even considering the 180 MHz PLL source, two 32-bit registers would last for more than 6,000 years before rollover.

I surmise that there is some well grounded reason that such a thing does not exist, and of which I am unaware.

 

[defragster]

There is a 32 bit counter that increments on each T_3.x and T4.x core clock tick: ARM_DWT_CYCCNT

It isn't active by default on T_3.x's. Once enabled each clock tick increments that value until it rolls over and continues counting.

This will start the counter if not already running:

  if ( ARM_DWT_CYCCNT == ARM_DWT_CYCCNT ) { // Enable CPU Cycle Counter
    ARM_DEMCR    |= ARM_DEMCR_TRCENA;         // enable debug/trace
    ARM_DWT_CTRL |= ARM_DWT_CTRL_CYCCNTENA;   // enable cycle counter
  }

Then using with unsigned 32 bit ints the math works - accounting for single rollover - with one or two vars of course - below uses two for diff:

  uint32_t count;
  uint32_t udiff;
    cycles = ARM_DWT_CYCCNT;
    delayMicroseconds( 50 );
    udiff = ARM_DWT_CYCCNT - cycles;

@luni has posted code encapsulating this into a 64 bit count, at least it works on T_4.x's.

 

[luni]

Here the link to said 64bit code https://github.com/TeensyUser/doc/wiki/Using-the-cycle-counter

 

[teensy3056]

defragster,

Thanks for that information.

After reading your response I found a single reference to "cycle counter" in the MK66FX1M0 Manual, chapter 13. However, other than the details you provided, I can find nothing else.

How did you know of it? It this just a standard part of ARM architectures?

 

[defragster]

defragster,

Thanks for that information.

After reading your response I found a single reference to "cycle counter" in the MK66FX1M0 Manual, chapter 13. However, other than the details you provided, I can find nothing else.

How did you know of it? It this just a standard part of ARM architectures?

Hope it helps for the purpose at hand.

The ARM_DWT_CYCCNT has been a recurring note here on the forum before and since joining. Except for the T_LC MCU - it is supported on the ARM processors in use on all the T_3.x's and T_4.x's. It is a common thing it seems - ESP32 has one as well.

Only takes about 3 cycles to store the value on a 1062 - so when the rollover isn't a problem it is faster and higher resolution based on core clock speed. On the T_4 micros() uses it to get the microsecond portion since the last millisecond tick.

@luni - thanks for the link

 

[PaulStoffregen]

It this just a standard part of ARM architectures?

Yes, it's part of the ARM processor. It has many features NXP doesn't mention in their reference manual.

While in theory you could learn of this by reading ARM's free documentation, the much better (but not free) path is the Definitive Guide book.

https://www.amazon.com/dp/0124080820