High speed DSP feasibility

N

nimish

Member
I have a use case which involves consuming 8x1bit samples @ up to 44MHz via an external clock (so 44MBps/352Mbps). I've got a teensy micromod lying around, and I'd like to do some fairly hefty DSP on it: running 8092FFT + some other processing is there any hope of having the Cortex M7 keep up at the full rate? I can deal with having to cut down to just 1/4 of that if necessary.

I sketched something out involving the two FlexIO DMA channels and CMSIS-DSP but I don't have a good idea if it's even worth trying on a Teensy vs biting the bullet and getting an fpga.
 
MarkT said:
Are you immediately decimating the signal(s)?
Click to expand...

It's an option, as well as telling the ADC/Front End to sample at a lower rate. https://datasheets.maximintegrated.com/en/ds/MAX2771.pdf is the front end. It spits out up to 4 bits (2bit I, 2bit Q) every cycle. I have 2 of them I want to interface with. Could also cut that down to just 1bit of just the I channel per chip. I want to at least be able to dump the full rate to a PC using USB 2.0 if possible.

Based on https://edadocs.software.keysight.c...ng-rate-for-the-gnss-waveforms-589305549.html the minimum rate is ~25MHz, but if needed I can also deal with undersampling technique (but I'm lazy and don't really want to deal with it)
 
Maybe some inspiration could come from the AudioInputPDM code?

https://www.pjrc.com/teensy/gui/?info=AudioInputPDM

https://github.com/PaulStoffregen/Audio/blob/master/input_pdm.cpp

It runs in master mode (generating the bit clock) so you'd need to change it to run in slave mode. I believe the SAI hardware can go up to 25 MHz bit clock, though the fastest we've tried so far is 11.3 MHz used by TDM.

The PDM code uses a big lookup table as the first step in implementing a long FIR filter. It's been quite a while since I wrote it, but as I recall it was using about 30% of the CPU on Teensy 3 to keep up with 2.8 MHz bit rate. So there's a good chance it could work with 25 MHz bitstreams on Teensy 4.
 
PaulStoffregen said:
Maybe some inspiration could come from the AudioInputPDM code?

https://www.pjrc.com/teensy/gui/?info=AudioInputPDM

https://github.com/PaulStoffregen/Audio/blob/master/input_pdm.cpp

It runs in master mode (generating the bit clock) so you'd need to change it to run in slave mode. I believe the SAI hardware can go up to 25 MHz bit clock, though the fastest we've tried so far is 11.3 MHz used by TDM.

The PDM code uses a big lookup table as the first step in implementing a long FIR filter. It's been quite a while since I wrote it, but as I recall it was using about 30% of the CPU on Teensy 3 to keep up with 2.8 MHz bit rate. So there's a good chance it could work with 25 MHz bitstreams on Teensy 4.
Click to expand...

Ah this is very useful. Assuming I can get https://github.com/TeensyUser/doc/wiki/FLEXIO to write the streams to memory, the actual signal processing is pretty straightforward. If that parallel IO library comes out that'd be all I need.
 
You must log in or register to reply here.
Back
Top