Sparkfun Tlc5940 and Teensy 4.0

[PaulS]

Perhaps the 74HC14 is a bit too slow for this application? I see a transition time of ~50ns.
Although you can operate a 74HC14 at 3V3, it's significant slower than running a 5V.
But more importantly, I'm not seeing 100nF decoupling capacitors - but maybe they are on the backside of that little PCB?

Paul

 

[Alex.v.neer]

100nf caps and wiring are at the back, ïll order some faster ones. For the meantme I'll experiment some more with this setup
running at 5V is not an option as the tlc boards all run at 3.3V

 

[PaulStoffregen]

But when I measure the output its worse than without an buffer.
....
Can the spi speed be adjusted in de tlclib?

You should definitely work to solve the signal quality problem first. If the waveform's rising and falling edges are terrible, lowering the clock speed means you'll still have the same terrible edges, just spaced out farther. If that does "work", it's really not the good way to solve such a problem.

But if you really want to change the SPI clock, on Teensy 4.x it's created by bitbanging. Look for this in pinouts/pin_functions.h:

#elif defined(TEENSYDUINO)
  #if F_CPU > 120000000
  #define pulse_pin(port, pin)        [COLOR="#FF0000"]delayNanoseconds(10)[/COLOR]; digitalWriteFast(pin, HIGH); [COLOR="#FF0000"]delayNanoseconds(20)[/COLOR]; digitalWriteFast(pin, LOW)

If you want slower, just change those delayNanoseconds() numbers to something larger.

 

[Alex.v.neer]

I used the buffer and they work only im using it at 3.3v and the teensy has less voltage drop so I changed it again without buffers.
I used your solution for quick fix. I have set main cpu speed to 8mhz. (In the teensduino compiler)Im reusing some old teensy3.2 bards. Signals are stable for 7 boards with 1.5 meter cable to the first board.
I think that is also what you can see if they use long cables in between.

 

[Alex.v.neer]

I added the delay that you sugested and it works better then slowing down the uc to 8mhz.
Are there more options to slow it down? I also adjusted the timer in the cpp file for the gclk, but that wasnt a good idea.
What is see now is i can extend but the last board gives the most problem. Do i need to terminate some signals ?

 

[MarkT]

For 3.3V signals 74LCX is probably the family of choice, as its designed for low voltage use. 74HC is designed principally for 5V and is much slower at lower voltages. LCX is pretty fast.

But if you really want good behaviour over long cables at high data rates you need to use transmission lines (constant characteristic impedance with correct termination resistance) - and this takes a lot of power unless using much smaller voltage swings (as with LVDS for instance). Otherwise some experimentation is needed to find the cleanest signal quality.

 

[Alex.v.neer]

For 3.3V signals 74LCX is probably the family of choice, as its designed for low voltage use. 74HC is designed principally for 5V and is much slower at lower voltages. LCX is pretty fast.

But if you really want good behaviour over long cables at high data rates you need to use transmission lines (constant characteristic impedance with correct termination resistance) - and this takes a lot of power unless using much smaller voltage swings (as with LVDS for instance). Otherwise some experimentation is needed to find the cleanest signal quality.

Ok thanks guys, I have for now a good enough working boards. For the next I'll go up to 5V for TLC and buffers. When I make the redesign I'll post my schematic with scope images of the signals.