AD7124 code example at maximum speed

[JBeale]

I'm sure people have done it, but I did not find a code example to demonstrate using the 24-bit ADC chip AD7124 in its "continuous read" mode at the maximum speed.
Normally the data is read out by first putting the 0x02 data register address into the COMMS register for each read, but in the faster mode you wait for DOUT/RDY* to drop and then just clock out the data only, as if the chip was a dumb output-only ADC.

So in case of interest, here is a Teensy 4 code example that does read out the chip in that mode.
In this case I used another pin, D8 externally connected to D12 (MISO = DOUT/RDY*) to monitor when the RDY line goes low to indicate the reading is ready, because apparently I can't separately access pin 12 with digitalRead() when I am using it for SPI (?)

I confirmed the timing with a logic analyzer to find that the readout rate is, on average, close to 19.2 kHz just as the datasheet says.
The sample-to-sample noise level is not great, but that's the trade-off you have with higher speeds.

https://github.com/jbeale1/DataAcq/b...nuous-read.ino

[JBeale]

Here is some measured data on noise performance at Gain = 1.
I was looking at RMS noise on Ch.0 (differential input pins AD0 and AD1) with 10 ohms across them.
The high side goes through 10k to the Vref Out of the chip (2.5 V) and the low side goes through 10k to ground.
So I have R1, R2, R3 in series from +2.5V to Gnd, and the ADC is looking across R2 (10 ohms), with R1=R3=10k.

// Continuous read mode on Analog Devices AD7124-8 24-bit ADC
// tested with Teensy 4.0 and EVAL-AD7124-8-PMDZ board
//
// RMS noise @ full power, Gain = 1, SINC4 filter, 10 ohm source impedance, measured:
// FS: 1284  15  Hz: 1.6 counts (23.3 bits RMS resolution)
// FS: 321   60  Hz: 1.9 counts (23 bits RMS resolution)
// FS: 64   301  Hz: 4.0 counts (22 bits RMS resolution)
// FS: 15  1.28 kHz: 8.3 counts (21 bits RMS resolution)
// FS: 1   19.2 kHz: 233 counts (16 bits RMS resolution)
//
// by J.Beale 9-Sep-2022