Synchronizing audio engine to external sample clock

h4yn0nnym0u5e

Well-known member
Inspired by this thread, I've been working on using the sample clock recovered from the S/PDIF input to drive the audio engine, thus avoiding the overhead of resampling. The results can be found at https://github.com/h4yn0nnym0u5e/Audio/commits/feature/sync-SPDIF-IO2: I've tested with sources running at 32, 44.1, 44.117, 48 and 96kHz, and everything seems to be (mostly) working. In particular, I think the original aim of processing audio from S/PDIF in to out is fine.

As a bonus feature, and because in order to drive the output using the input clock requires routing via one of the SAI (I2S) modules anyway, I've tried to make the I2S objects also run from the recovered clock. This has mostly been successful, but there seems to be a weird residual issue where the occasional sample gets dropped or repeated in the I2S output. It's related to the difference in sample rates, so if the input is from a Teensy 3.2 at 44.117kHz, there's a faint "ticking" sound at about 17Hz. I've 'scoped the ISRs for both objects (AudioOutputI2S and AudioOutputSPDIF3) and they're 100% locked together.

If anybody cares to make a suggestion, or even find and fix the problem, I (and the rest of the Teensy audio world...) would be most grateful :D

If you're trying this out, don't forget that the audio library still "thinks" its sample rate is whatever the value of AUDIO_SAMPLE_RATE_EXACT is, so if you feed it a 48kHz S/PDIF signal (such as most TVs output), then all your synth waveforms will be about 1.5 semitones sharp... 96kHz and you're suddenly playing a high Eb transposing instrument! Sopranino sax, anyone?
 
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